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An automatic device model synthesizer

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.

Source Files (show merged sources derived from linked package)

Filename Size Changed Actions
adms-2.3.6.tar.gz 180 KB 12 months ago Download File
adms-no-build-time.patch 3.31 KB about 4 years ago Download File
adms.changes 2.73 KB 12 months ago Download File
adms.spec 2.6 KB 9 months ago Download File

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