File pr36822.diff of Package gcc43

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From: "Andreas Krebbel" <Andreas dot Krebbel at de dot ibm dot com>
Date: Thu, 17 Jul 2008 15:26:11 +0200
To: gcc-patches at gcc dot gnu dot org
Subject: [PATCH] PR36822 recog: Reorder extra memory constraint checks for inline assemblies
Message-ID: <20080717132611.GA27503@homer.boeblingen.de.ibm.com>
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Hello,

in order to get the best out of reload a back end might want to define
the most generic extra memory constraint to actually accept more than
the addresses accepted by GO_IF_LEGITIMATE_ADDRESS and the 'm'
constraint.

The reason for this is the way reload performs modifications in the
RTL stream.  It first just records the changes for an insn in
separated data structures without actually changing the INSN.  After a
reload for a part of an address has been pushed. An extra memory
constraints still might get evaluated for the original address (which
has already been fixed at this point).  Unfortunately the fix is not
visible to the back end (without using find_replacement hacks).  So
e.g. the 'R' constraint on S/390 basically accepts everything wrapped
into a MEM rtx although the documentation says that it only accepts
base+index+12bit displacement.  Performance measurements have proven
that a stricter check here has a negative impact which is caused by
worse exploitation of the address formats.

This usually doesn't hurt since reload fixes all addresses not passing
GO_IF_LEGITIMATE_ADDRESS before looking at any constraints.

While recognizing "normal" INSN patterns the predicate would make sure
that adresses do at least pass GO_IF_LEGITIMATE_ADDRESS.  But this
does not happen for inline assemblies.  If a back end defines an extra
memory constraint more general than GO_IF_LEGITIMATE_ADDRESS
optimizers like combine feel free to build arbitrarily complex MEM
RTXs into asm parameters which even reload is not able to fix.  In
order to prevent this recog should make sure that when matching an
extra memory constraint for an inline assembly that the parameter at
least passes the most generic checks for memory and address operands.
This somewhat limits the creativity of combine in those cases.

The attached patch just changes the order of the existing checks in
asm_operand_ok in order to make sure that we don't accept arbitrary
RTXs just because the back end says its ok for a certain extra memory
constraint.  For extra memory constraint we only have to make sure
that the address can be handled by reload.  Everything that passes
memory_operand or address_operand should be ok then.

Boostrapped on x86_64, s390 and s390x. This fixes the included
testcase on s390x.

OK for mainline?

Bye,

-Andreas-


2008-07-17  Andreas Krebbel  <krebbel1@de.ibm.com>

	PR target/36822
	* recog.c (asm_operand_ok): Change the order of the extra
	memory constraint checks.

2008-07-17  Andreas Krebbel  <krebbel1@de.ibm.com>

	PR target/36822
	* gcc.target/s390/pr36822.c: New testcase.

Index: gcc/recog.c
===================================================================
--- gcc/recog.c.orig	2009-11-20 13:51:27.000000000 +0100
+++ gcc/recog.c	2009-11-20 13:51:36.000000000 +0100
@@ -1735,16 +1735,14 @@ asm_operand_ok (rtx op, const char *cons
 		result = 1;
 	    }
 #ifdef EXTRA_CONSTRAINT_STR
+	  else if (EXTRA_MEMORY_CONSTRAINT (c, constraint))
+	    /* Every memory operand can be reloaded to fit.  */
+	    result = result || memory_operand (op, VOIDmode);
+	  else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint))
+	    /* Every address operand can be reloaded to fit.  */
+	    result = result || address_operand (op, VOIDmode);
 	  else if (EXTRA_CONSTRAINT_STR (op, c, constraint))
 	    result = 1;
-	  else if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
-		   /* Every memory operand can be reloaded to fit.  */
-		   && memory_operand (op, VOIDmode))
-	    result = 1;
-	  else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint)
-		   /* Every address operand can be reloaded to fit.  */
-		   && address_operand (op, VOIDmode))
-	    result = 1;
 #endif
 	  break;
 	}
Index: gcc/testsuite/gcc.target/s390/pr36822.c
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ gcc/testsuite/gcc.target/s390/pr36822.c	2009-11-20 13:51:36.000000000 +0100
@@ -0,0 +1,16 @@
+/* This used to ICE on s390 due to bug in the definition of the 'R'
+   constraint which replaced the 'm' constraint (together with 'T')
+   while adding z10 support.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+
+int boo()
+{
+  struct {
+    unsigned char pad[4096];
+    unsigned long long bar;
+  } *foo;
+  asm volatile( "" : "=m" (*(unsigned long long*)(foo->bar))
+		: "a" (&foo->bar));
+}