An automatic device model synthesizer
ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.
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Source Files
Filename | Size | Changed |
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adms-2.3.4.tar.gz | 0000769077 751 KB | |
adms-no-build-time.patch | 0000003393 3.31 KB | |
adms.changes | 0000000637 637 Bytes | |
adms.spec | 0000001954 1.91 KB |
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