File 20225-amd-iommu-polling-loop.patch of Package xen

# HG changeset patch
# User Keir Fraser <keir.fraser@citrix.com>
# Date 1253258986 -3600
# Node ID 438c440f2a7ff443085af915db0d3bc950613afb
# Parent  0f05e956957d2e02d4a9de93a54b7777aef95fe2
AMD IOMMU: Extend the loop counter for polling completion wait bit.

Signed-off-by: Wei Wang <wei.wang2@amd.com>

--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -23,8 +23,6 @@
 #include <asm/amd-iommu.h>
 #include <asm/hvm/svm/amd-iommu-proto.h>
 
-long amd_iommu_poll_comp_wait = COMPLETION_WAIT_DEFAULT_POLLING_COUNT;
-
 static int queue_iommu_command(struct amd_iommu *iommu, u32 cmd[])
 {
     u32 tail, head, *cmd_buffer;
@@ -131,32 +129,24 @@ void flush_command_buffer(struct amd_iom
                          IOMMU_COMP_WAIT_I_FLAG_SHIFT, &cmd[0]);
     send_iommu_command(iommu, cmd);
 
-    /* wait for 'ComWaitInt' to signal comp#endifletion? */
-    if ( amd_iommu_poll_comp_wait )
-    {
-        loop_count = amd_iommu_poll_comp_wait;
-        do {
-            status = readl(iommu->mmio_base +
-                           IOMMU_STATUS_MMIO_OFFSET);
-            comp_wait = get_field_from_reg_u32(
-                status,
-                IOMMU_STATUS_COMP_WAIT_INT_MASK,
-                IOMMU_STATUS_COMP_WAIT_INT_SHIFT);
-            --loop_count;
-        } while ( loop_count && !comp_wait );
-
-        if ( comp_wait )
-        {
-            /* clear 'ComWaitInt' in status register (WIC) */
-            status &= IOMMU_STATUS_COMP_WAIT_INT_MASK;
-            writel(status, iommu->mmio_base +
-                   IOMMU_STATUS_MMIO_OFFSET);
-        }
-        else
-        {
-            amd_iov_warning("Warning: ComWaitInt bit did not assert!\n");
-        }
+    /* Make loop_count long enough for polling completion wait bit */
+    loop_count = 1000;
+    do {
+        status = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+        comp_wait = get_field_from_reg_u32(status,
+            IOMMU_STATUS_COMP_WAIT_INT_MASK,
+            IOMMU_STATUS_COMP_WAIT_INT_SHIFT);
+        --loop_count;
+    } while ( !comp_wait && loop_count );
+
+    if ( comp_wait )
+    {
+        /* clear 'ComWaitInt' in status register (WIC) */
+        status &= IOMMU_STATUS_COMP_WAIT_INT_MASK;
+        writel(status, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+        return;
     }
+    amd_iov_warning("Warning: ComWaitInt bit did not assert!\n");
 }
 
 static void clear_page_table_entry_present(u32 *pte)
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
@@ -29,9 +29,6 @@
 #define IOMMU_RESERVED_BASE_ADDR	0
 #define IOMMU_RESERVED_PAGES		32
 
-/* IOMMU ComWaitInt polling after issuing a COMPLETION_WAIT command */
-#define COMPLETION_WAIT_DEFAULT_POLLING_COUNT	10
-
 /* IOMMU Command Buffer entries: in power of 2 increments, minimum of 256 */
 #define IOMMU_CMD_BUFFER_DEFAULT_ENTRIES	512