File backport-llvm-r216131 of Package llvm

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r216131 | samsonov | 2014-08-20 23:56:43 +0200 (Wed, 20 Aug 2014) | 4 lines

Fix undefined behavior (left shift of negative value) in SystemZ backend.

This bug is reported by UBSan.

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Index: lib/Target/SystemZ/SystemZFrameLowering.cpp
===================================================================
--- lib/Target/SystemZ/SystemZFrameLowering.cpp.orig
+++ lib/Target/SystemZ/SystemZFrameLowering.cpp
@@ -294,7 +294,7 @@ static void emitIncrement(MachineBasicBl
     else {
       Opcode = SystemZ::AGFI;
       // Make sure we maintain 8-byte stack alignment.
-      int64_t MinVal = -int64_t(1) << 31;
+      int64_t MinVal = -uint64_t(1) << 31;
       int64_t MaxVal = (int64_t(1) << 31) - 8;
       if (ThisVal < MinVal)
         ThisVal = MinVal;
Index: lib/Target/SystemZ/SystemZISelLowering.cpp
===================================================================
--- lib/Target/SystemZ/SystemZISelLowering.cpp.orig
+++ lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -2804,14 +2804,10 @@ SystemZTargetLowering::emitAtomicLoadBin
     unsigned Tmp = MRI.createVirtualRegister(RC);
     BuildMI(MBB, DL, TII->get(BinOpcode), Tmp)
       .addReg(RotatedOldVal).addOperand(Src2);
-    if (BitSize < 32)
+    if (BitSize <= 32)
       // XILF with the upper BitSize bits set.
       BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
-        .addReg(Tmp).addImm(uint32_t(~0 << (32 - BitSize)));
-    else if (BitSize == 32)
-      // XILF with every bit set.
-      BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
-        .addReg(Tmp).addImm(~uint32_t(0));
+        .addReg(Tmp).addImm(-1U << (32 - BitSize));
     else {
       // Use LCGR and add -1 to the result, which is more compact than
       // an XILF, XILH pair.