File CVE-2015-8745-qemuu-net-vmxnet3-read-IMR-regist... of Package xen.10696

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File CVE-2015-8745-qemuu-net-vmxnet3-read-IMR-registers-instead-of-assert.patch of Package xen.10696

Subject: vmxnet3: Support reading IMR registers on bar0
From: Shmulik Ladkani shmulik.ladkani@ravellosystems.com Mon Sep 21 17:09:02 2015 +0300
Date: Mon Oct 12 13:19:29 2015 +0800:
Git: c6048f849c7e3f009786df76206e895a69de032c

Instead of asserting, return the actual IMR register value.
This is aligned with what's returned on ESXi.

Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
Tested-by: Dana Rubin <dana.rubin@ravellosystems.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>

Index: xen-4.5.2-testing/tools/qemu-xen-dir-remote/hw/net/vmxnet3.c
===================================================================
--- xen-4.5.2-testing.orig/tools/qemu-xen-dir-remote/hw/net/vmxnet3.c
+++ xen-4.5.2-testing/tools/qemu-xen-dir-remote/hw/net/vmxnet3.c
@@ -1107,9 +1107,13 @@ vmxnet3_io_bar0_write(void *opaque, hwad
 static uint64_t
 vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
 {
+    VMXNET3State *s = opaque;
+
     if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
                         VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
-        g_assert_not_reached();
+        int l = VMW_MULTIREG_IDX_BY_ADDR(addr, VMXNET3_REG_IMR,
+                                         VMXNET3_REG_ALIGN);
+        return s->interrupt_states[l].is_masked;
     }
 
     VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);

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File CVE-2015-8745-qemuu-net-vmxnet3-read-IMR-registers-instead-of-assert.patch of Package xen.10696

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