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SUSE:SLE-12-SP2:Update
u-boot-a10-olinuxino-lime
0024-fdt-import-bcm283x-device-tree-sour.patch
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File 0024-fdt-import-bcm283x-device-tree-sour.patch of Package u-boot-a10-olinuxino-lime
From e3c18763267c840d7eb3295e7025e44cbbd017a7 Mon Sep 17 00:00:00 2001 From: Fabian Vogt <fvogt@suse.com> Date: Thu, 8 Sep 2016 14:30:24 +0200 Subject: [PATCH] fdt: import bcm283x device tree sources from the linux kernel tree This patch adds device trees for the bcm283x platform to be used with OF_CONTROL. bcm283x-uboot.dtsi adds the u-boot specific "skip-init" property to the serial nodes and enables initialization in the pre-reloc phase. --- arch/arm/dts/bcm2835-rpi-a-plus.dts | 35 ++++ arch/arm/dts/bcm2835-rpi-a.dts | 28 +++ arch/arm/dts/bcm2835-rpi-b-plus.dts | 36 ++++ arch/arm/dts/bcm2835-rpi-b-rev2.dts | 29 +++ arch/arm/dts/bcm2835-rpi-b.dts | 23 +++ arch/arm/dts/bcm2835-rpi.dtsi | 85 +++++++++ arch/arm/dts/bcm2835.dtsi | 25 +++ arch/arm/dts/bcm2836-rpi-2-b.dts | 40 ++++ arch/arm/dts/bcm2836.dtsi | 78 ++++++++ arch/arm/dts/bcm2837-rpi-3-b.dts | 30 +++ arch/arm/dts/bcm2837.dtsi | 76 ++++++++ arch/arm/dts/bcm283x-rpi-smsc9512.dtsi | 19 ++ arch/arm/dts/bcm283x-rpi-smsc9514.dtsi | 19 ++ arch/arm/dts/bcm283x-uboot.dtsi | 22 +++ arch/arm/dts/bcm283x.dtsi | 322 +++++++++++++++++++++++++++++++++ 15 files changed, 867 insertions(+) create mode 100644 arch/arm/dts/bcm2835-rpi-a-plus.dts create mode 100644 arch/arm/dts/bcm2835-rpi-a.dts create mode 100644 arch/arm/dts/bcm2835-rpi-b-plus.dts create mode 100644 arch/arm/dts/bcm2835-rpi-b-rev2.dts create mode 100644 arch/arm/dts/bcm2835-rpi-b.dts create mode 100644 arch/arm/dts/bcm2835-rpi.dtsi create mode 100644 arch/arm/dts/bcm2835.dtsi create mode 100644 arch/arm/dts/bcm2836-rpi-2-b.dts create mode 100644 arch/arm/dts/bcm2836.dtsi create mode 100644 arch/arm/dts/bcm2837-rpi-3-b.dts create mode 100644 arch/arm/dts/bcm2837.dtsi create mode 100644 arch/arm/dts/bcm283x-rpi-smsc9512.dtsi create mode 100644 arch/arm/dts/bcm283x-rpi-smsc9514.dtsi create mode 100644 arch/arm/dts/bcm283x-uboot.dtsi create mode 100644 arch/arm/dts/bcm283x.dtsi diff --git a/arch/arm/dts/bcm2835-rpi-a-plus.dts b/arch/arm/dts/bcm2835-rpi-a-plus.dts new file mode 100644 index 0000000..35ff4e7 --- /dev/null +++ b/arch/arm/dts/bcm2835-rpi-a-plus.dts @@ -0,0 +1,35 @@ +/dts-v1/; +#include "bcm2835.dtsi" +#include "bcm2835-rpi.dtsi" + +/ { + compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; + model = "Raspberry Pi Model A+"; + + leds { + act { + gpios = <&gpio 47 0>; + }; + + pwr { + label = "PWR"; + gpios = <&gpio 35 0>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; +}; + +&gpio { + pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; + + /* I2S interface */ + i2s_alt0: i2s_alt0 { + brcm,pins = <18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/dts/bcm2835-rpi-a.dts b/arch/arm/dts/bcm2835-rpi-a.dts new file mode 100644 index 0000000..306a84e --- /dev/null +++ b/arch/arm/dts/bcm2835-rpi-a.dts @@ -0,0 +1,28 @@ +/dts-v1/; +#include "bcm2835.dtsi" +#include "bcm2835-rpi.dtsi" + +/ { + compatible = "raspberrypi,model-a", "brcm,bcm2835"; + model = "Raspberry Pi Model A"; + + leds { + act { + gpios = <&gpio 16 1>; + }; + }; +}; + +&gpio { + pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; + + /* I2S interface */ + i2s_alt2: i2s_alt2 { + brcm,pins = <28 29 30 31>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; diff --git a/arch/arm/dts/bcm2835-rpi-b-plus.dts b/arch/arm/dts/bcm2835-rpi-b-plus.dts new file mode 100644 index 0000000..d5fdb8e --- /dev/null +++ b/arch/arm/dts/bcm2835-rpi-b-plus.dts @@ -0,0 +1,36 @@ +/dts-v1/; +#include "bcm2835.dtsi" +#include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" + +/ { + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; + model = "Raspberry Pi Model B+"; + + leds { + act { + gpios = <&gpio 47 0>; + }; + + pwr { + label = "PWR"; + gpios = <&gpio 35 0>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; +}; + +&gpio { + pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; + + /* I2S interface */ + i2s_alt0: i2s_alt0 { + brcm,pins = <18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/dts/bcm2835-rpi-b-rev2.dts new file mode 100644 index 0000000..bfc4bd9 --- /dev/null +++ b/arch/arm/dts/bcm2835-rpi-b-rev2.dts @@ -0,0 +1,29 @@ +/dts-v1/; +#include "bcm2835.dtsi" +#include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-smsc9512.dtsi" + +/ { + compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; + model = "Raspberry Pi Model B rev2"; + + leds { + act { + gpios = <&gpio 16 1>; + }; + }; +}; + +&gpio { + pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; + + /* I2S interface */ + i2s_alt2: i2s_alt2 { + brcm,pins = <28 29 30 31>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/dts/bcm2835-rpi-b.dts b/arch/arm/dts/bcm2835-rpi-b.dts new file mode 100644 index 0000000..0371bb7 --- /dev/null +++ b/arch/arm/dts/bcm2835-rpi-b.dts @@ -0,0 +1,23 @@ +/dts-v1/; +#include "bcm2835.dtsi" +#include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-smsc9512.dtsi" + +/ { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; + model = "Raspberry Pi Model B"; + + leds { + act { + gpios = <&gpio 16 1>; + }; + }; +}; + +&gpio { + pinctrl-0 = <&gpioout &alt0 &alt3>; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; diff --git a/arch/arm/dts/bcm2835-rpi.dtsi b/arch/arm/dts/bcm2835-rpi.dtsi new file mode 100644 index 0000000..caf2707 --- /dev/null +++ b/arch/arm/dts/bcm2835-rpi.dtsi @@ -0,0 +1,85 @@ +#include <dt-bindings/power/raspberrypi-power.h> + +/ { + memory { + reg = <0 0x10000000>; + }; + + leds { + compatible = "gpio-leds"; + + act { + label = "ACT"; + default-state = "keep"; + linux,default-trigger = "heartbeat"; + }; + }; + + soc { + firmware: firmware { + compatible = "raspberrypi,bcm2835-firmware"; + mboxes = <&mailbox>; + }; + + power: power { + compatible = "raspberrypi,bcm2835-power"; + firmware = <&firmware>; + #power-domain-cells = <1>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + + gpioout: gpioout { + brcm,pins = <6>; + brcm,function = <BCM2835_FSEL_GPIO_OUT>; + }; + + alt0: alt0 { + brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + + alt3: alt3 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c2 { + status = "okay"; +}; + +&sdhci { + status = "okay"; + bus-width = <4>; +}; + +&pwm { + status = "okay"; +}; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; + +&v3d { + power-domains = <&power RPI_POWER_DOMAIN_V3D>; +}; + +&hdmi { + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2835.dtsi b/arch/arm/dts/bcm2835.dtsi new file mode 100644 index 0000000..a78759e --- /dev/null +++ b/arch/arm/dts/bcm2835.dtsi @@ -0,0 +1,25 @@ +#include "bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2835"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,arm1176jzf-s"; + reg = <0x0>; + }; + }; + + soc { + ranges = <0x7e000000 0x20000000 0x02000000>; + dma-ranges = <0x40000000 0x00000000 0x20000000>; + + arm-pmu { + compatible = "arm,arm1176-pmu"; + }; + }; +}; diff --git a/arch/arm/dts/bcm2836-rpi-2-b.dts b/arch/arm/dts/bcm2836-rpi-2-b.dts new file mode 100644 index 0000000..29e1cfe --- /dev/null +++ b/arch/arm/dts/bcm2836-rpi-2-b.dts @@ -0,0 +1,40 @@ +/dts-v1/; +#include "bcm2836.dtsi" +#include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" + +/ { + compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; + model = "Raspberry Pi 2 Model B"; + + memory { + reg = <0 0x40000000>; + }; + + leds { + act { + gpios = <&gpio 47 0>; + }; + + pwr { + label = "PWR"; + gpios = <&gpio 35 0>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; +}; + +&gpio { + pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; + + /* I2S interface */ + i2s_alt0: i2s_alt0 { + brcm,pins = <18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; +}; + +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/dts/bcm2836.dtsi b/arch/arm/dts/bcm2836.dtsi new file mode 100644 index 0000000..9d0651d --- /dev/null +++ b/arch/arm/dts/bcm2836.dtsi @@ -0,0 +1,78 @@ +#include "bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2836"; + + soc { + ranges = <0x7e000000 0x3f000000 0x1000000>, + <0x40000000 0x40000000 0x00001000>; + dma-ranges = <0xc0000000 0x00000000 0x3f000000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + + arm-pmu { + compatible = "arm,cortex-a7-pmu"; + interrupt-parent = <&local_intc>; + interrupts = <9>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&local_intc>; + interrupts = <0>, // PHYS_SECURE_PPI + <1>, // PHYS_NONSECURE_PPI + <3>, // VIRT_PPI + <2>; // HYP_PPI + always-on; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + v7_cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf00>; + clock-frequency = <800000000>; + }; + + v7_cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf01>; + clock-frequency = <800000000>; + }; + + v7_cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf02>; + clock-frequency = <800000000>; + }; + + v7_cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0xf03>; + clock-frequency = <800000000>; + }; + }; +}; + +/* Make the BCM2835-style global interrupt controller be a child of the + * CPU-local interrupt controller. + */ +&intc { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; +}; diff --git a/arch/arm/dts/bcm2837-rpi-3-b.dts b/arch/arm/dts/bcm2837-rpi-3-b.dts new file mode 100644 index 0000000..7841b72 --- /dev/null +++ b/arch/arm/dts/bcm2837-rpi-3-b.dts @@ -0,0 +1,30 @@ +/dts-v1/; +#include "bcm2837.dtsi" +#include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-smsc9514.dtsi" + +/ { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B"; + + memory { + reg = <0 0x40000000>; + }; + + leds { + act { + gpios = <&gpio 47 0>; + }; + + pwr { + label = "PWR"; + gpios = <&gpio 35 0>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2837.dtsi b/arch/arm/dts/bcm2837.dtsi new file mode 100644 index 0000000..8216bbb --- /dev/null +++ b/arch/arm/dts/bcm2837.dtsi @@ -0,0 +1,76 @@ +#include "bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2836"; + + soc { + ranges = <0x7e000000 0x3f000000 0x1000000>, + <0x40000000 0x40000000 0x00001000>; + dma-ranges = <0xc0000000 0x00000000 0x3f000000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&local_intc>; + interrupts = <0>, // PHYS_SECURE_PPI + <1>, // PHYS_NONSECURE_PPI + <3>, // VIRT_PPI + <2>; // HYP_PPI + always-on; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000d8>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e0>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <2>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e8>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <3>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000f0>; + }; + }; +}; + +/* Make the BCM2835-style global interrupt controller be a child of the + * CPU-local interrupt controller. + */ +&intc { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; +}; diff --git a/arch/arm/dts/bcm283x-rpi-smsc9512.dtsi b/arch/arm/dts/bcm283x-rpi-smsc9512.dtsi new file mode 100644 index 0000000..12c981e --- /dev/null +++ b/arch/arm/dts/bcm283x-rpi-smsc9512.dtsi @@ -0,0 +1,19 @@ +/ { + aliases { + ethernet = ðernet; + }; +}; + +&usb { + usb1@1 { + compatible = "usb424,9512"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet: usbether@1 { + compatible = "usb424,ec00"; + reg = <1>; + }; + }; +}; diff --git a/arch/arm/dts/bcm283x-rpi-smsc9514.dtsi b/arch/arm/dts/bcm283x-rpi-smsc9514.dtsi new file mode 100644 index 0000000..3f0a56e --- /dev/null +++ b/arch/arm/dts/bcm283x-rpi-smsc9514.dtsi @@ -0,0 +1,19 @@ +/ { + aliases { + ethernet = ðernet; + }; +}; + +&usb { + usb1@1 { + compatible = "usb424,9514"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet: usbether@1 { + compatible = "usb424,ec00"; + reg = <1>; + }; + }; +}; diff --git a/arch/arm/dts/bcm283x-uboot.dtsi b/arch/arm/dts/bcm283x-uboot.dtsi new file mode 100644 index 0000000..8e4231a --- /dev/null +++ b/arch/arm/dts/bcm283x-uboot.dtsi @@ -0,0 +1,22 @@ +/* + * U-Boot addition to keep baudrate set by firmware + * and also initialize before relocation. + * + * (C) Copyright 2016 Fabian Vogt <fvogt@suse.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&soc { + u-boot,dm-pre-reloc; +}; + +&uart0 { + skip-init; + u-boot,dm-pre-reloc; +}; + +&uart1 { + skip-init; + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/bcm283x.dtsi b/arch/arm/dts/bcm283x.dtsi new file mode 100644 index 0000000..2c5528f --- /dev/null +++ b/arch/arm/dts/bcm283x.dtsi @@ -0,0 +1,322 @@ +#include <dt-bindings/pinctrl/bcm2835.h> +#include <dt-bindings/clock/bcm2835.h> +#include <dt-bindings/clock/bcm2835-aux.h> +#include <dt-bindings/gpio/gpio.h> +#include "skeleton.dtsi" + +/* This include file covers the common peripherals and configuration between + * bcm2835 and bcm2836 implementations, leaving the CPU configuration to + * bcm2835.dtsi and bcm2836.dtsi. + */ + +/ { + compatible = "brcm,bcm2835"; + model = "BCM2835"; + interrupt-parent = <&intc>; + + chosen { + bootargs = "earlyprintk console=ttyAMA0"; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + timer@7e003000 { + compatible = "brcm,bcm2835-system-timer"; + reg = <0x7e003000 0x1000>; + interrupts = <1 0>, <1 1>, <1 2>, <1 3>; + /* This could be a reference to BCM2835_CLOCK_TIMER, + * but we don't have the driver using the common clock + * support yet. + */ + clock-frequency = <1000000>; + }; + + dma: dma@7e007000 { + compatible = "brcm,bcm2835-dma"; + reg = <0x7e007000 0xf00>; + interrupts = <1 16>, + <1 17>, + <1 18>, + <1 19>, + <1 20>, + <1 21>, + <1 22>, + <1 23>, + <1 24>, + <1 25>, + <1 26>, + /* dma channel 11-14 share one irq */ + <1 27>, + <1 27>, + <1 27>, + <1 27>, + /* unused shared irq for all channels */ + <1 28>; + interrupt-names = "dma0", + "dma1", + "dma2", + "dma3", + "dma4", + "dma5", + "dma6", + "dma7", + "dma8", + "dma9", + "dma10", + "dma11", + "dma12", + "dma13", + "dma14", + "dma-shared-all"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x7f35>; + }; + + intc: interrupt-controller@7e00b200 { + compatible = "brcm,bcm2835-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + watchdog@7e100000 { + compatible = "brcm,bcm2835-pm-wdt"; + reg = <0x7e100000 0x28>; + }; + + clocks: cprman@7e101000 { + compatible = "brcm,bcm2835-cprman"; + #clock-cells = <1>; + reg = <0x7e101000 0x2000>; + + /* CPRMAN derives everything from the platform's + * oscillator. + */ + clocks = <&clk_osc>; + }; + + rng@7e104000 { + compatible = "brcm,bcm2835-rng"; + reg = <0x7e104000 0x10>; + }; + + mailbox: mailbox@7e00b800 { + compatible = "brcm,bcm2835-mbox"; + reg = <0x7e00b880 0x40>; + interrupts = <0 1>; + #mbox-cells = <0>; + }; + + gpio: gpio@7e200000 { + compatible = "brcm,bcm2835-gpio"; + reg = <0x7e200000 0xb4>; + /* + * The GPIO IP block is designed for 3 banks of GPIOs. + * Each bank has a GPIO interrupt for itself. + * There is an overall "any bank" interrupt. + * In order, these are GIC interrupts 17, 18, 19, 20. + * Since the BCM2835 only has 2 banks, the 2nd bank + * interrupt output appears to be mirrored onto the + * 3rd bank's interrupt signal. + * So, a bank0 interrupt shows up on 17, 20, and + * a bank1 interrupt shows up on 18, 19, 20! + */ + interrupts = <2 17>, <2 18>, <2 19>, <2 20>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart0: serial@7e201000 { + compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; + reg = <0x7e201000 0x1000>; + interrupts = <2 25>; + clocks = <&clocks BCM2835_CLOCK_UART>, + <&clocks BCM2835_CLOCK_VPU>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + }; + + i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = <0x7e203000 0x20>, + <0x7e101098 0x02>; + + dmas = <&dma 2>, + <&dma 3>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + spi: spi@7e204000 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7e204000 0x1000>; + interrupts = <2 22>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c0: i2c@7e205000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e205000 0x1000>; + interrupts = <2 21>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pixelvalve@7e206000 { + compatible = "brcm,bcm2835-pixelvalve0"; + reg = <0x7e206000 0x100>; + interrupts = <2 13>; /* pwa0 */ + }; + + pixelvalve@7e207000 { + compatible = "brcm,bcm2835-pixelvalve1"; + reg = <0x7e207000 0x100>; + interrupts = <2 14>; /* pwa1 */ + }; + + aux: aux@0x7e215000 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <1>; + reg = <0x7e215000 0x8>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + }; + + uart1: serial@7e215040 { + compatible = "brcm,bcm2835-aux-uart"; + reg = <0x7e215040 0x40>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_UART>; + status = "disabled"; + }; + + spi1: spi@7e215080 { + compatible = "brcm,bcm2835-aux-spi"; + reg = <0x7e215080 0x40>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_SPI1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi2: spi@7e2150c0 { + compatible = "brcm,bcm2835-aux-spi"; + reg = <0x7e2150c0 0x40>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_SPI2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pwm: pwm@7e20c000 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7e20c000 0x28>; + clocks = <&clocks BCM2835_CLOCK_PWM>; + assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; + assigned-clock-rates = <10000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + sdhci: sdhci@7e300000 { + compatible = "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; + clocks = <&clocks BCM2835_CLOCK_EMMC>; + status = "disabled"; + }; + + hvs@7e400000 { + compatible = "brcm,bcm2835-hvs"; + reg = <0x7e400000 0x6000>; + interrupts = <2 1>; + }; + + i2c1: i2c@7e804000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e804000 0x1000>; + interrupts = <2 21>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@7e805000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e805000 0x1000>; + interrupts = <2 21>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pixelvalve@7e807000 { + compatible = "brcm,bcm2835-pixelvalve2"; + reg = <0x7e807000 0x100>; + interrupts = <2 10>; /* pixelvalve */ + }; + + hdmi: hdmi@7e902000 { + compatible = "brcm,bcm2835-hdmi"; + reg = <0x7e902000 0x600>, + <0x7e808000 0x100>; + interrupts = <2 8>, <2 9>; + ddc = <&i2c2>; + clocks = <&clocks BCM2835_PLLH_PIX>, + <&clocks BCM2835_CLOCK_HSM>; + clock-names = "pixel", "hdmi"; + status = "disabled"; + }; + + usb: usb@7e980000 { + compatible = "brcm,bcm2835-usb"; + reg = <0x7e980000 0x10000>; + interrupts = <1 9>; + #address-cells = <1>; + #size-cells = <0>; + }; + + v3d: v3d@7ec00000 { + compatible = "brcm,bcm2835-v3d"; + reg = <0x7ec00000 0x1000>; + interrupts = <1 10>; + }; + + vc4: gpu { + compatible = "brcm,bcm2835-vc4"; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + /* The oscillator is the root of the clock tree. */ + clk_osc: clock@3 { + compatible = "fixed-clock"; + reg = <3>; + #clock-cells = <0>; + clock-output-names = "osc"; + clock-frequency = <19200000>; + }; + + }; +}; + +#include "bcm283x-uboot.dtsi"
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