File oprofile-remove-unused-power-8-unit-masks.patch of Package oprofile
Author: William Cohen <wcohen@redhat.com>
Subject: Remove unused Power 8 unit masks
Date: Thu Nov 19 16:29:22 2015 -0500
Git-commit: 54bd5569033f7ec395e47efc5264d95e48907475
References: FATE#319565, bsc#965789
Signed-off-by: Tony Jones <tonyj@suse.de>
Remove unused Power 8 unit masks
To prevent people from using PMU events that the kernel would reject
on Power 8 commit 34715734fd6f commented out those events. However,
additional checks in oprofile code would note that some of the unit
masks were unused due to those commented out events and prevent
oprofile tools from running. The unused unit masks have been
commented out to pass these checks.
Signed-off-by: William Cohen <wcohen@redhat.com>
diff --git a/events/ppc64/power8/unit_masks b/events/ppc64/power8/unit_masks
index 203af97..96b32c0 100644
--- a/events/ppc64/power8/unit_masks
+++ b/events/ppc64/power8/unit_masks
@@ -9,9 +9,26 @@
# to workaround oprofile's 32-bit limitation for event codes.
# See libpe_utils/op_pe_utils.cpp:_get_event_code for how these codes are
# used.
+#
+#note 1. 11/12/2015
+#
+# Some event requires the cache selector bits to be set to a non-zero
+# value in the processor performance counter setup register. On Power 8, this
+# register is only writable by the hypervisor. So the kernel must reject any
+# event where the lower three cache selector bits (bits 22:20) are not equal
+# to 0. If/when an API is implemented to allow the kernel to request the
+# hypervisor write the register with the required value, these events can be
+# re-added to the list of supported events. The issue is documented in the
+# powerpc kernel file arch/powerpc/perf/power8-pmu.c in function power8_get_constraint()
+# where the cache bits are ANDed with 0x7 if the unit is between 6 and 9. If
+# cache bits are not zero, the function returns -1 to reject the event.
+#
+# The associated unit masks for these problem events are unused and also need
+# to be commented out.
+#
name:zero type:mandatory default:0x0
0x0 No unit mask
-name:rc_machine type:mandatory default:0xde
- 0xde Thresholdable start/stop for rc machine for sampled instruction
-name:L1_latency type:mandatory default:0x67
- 0x67 Thresholdable start/stop for L1 sampled instruction load miss/reload
+## note 1 name:rc_machine type:mandatory default:0xde
+## note 1 0xde Thresholdable start/stop for rc machine for sampled instruction
+## note 1 name:L1_latency type:mandatory default:0x67
+## note 1 0x67 Thresholdable start/stop for L1 sampled instruction load miss/reload