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SUSE:SLE-12-SP3:Update
xen
xsa435-0-22.patch
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File xsa435-0-22.patch of Package xen
From 03812da3754d550dd8cbee7289469069ea6f0073 Mon Sep 17 00:00:00 2001 From: Andrew Cooper <andrew.cooper3@citrix.com> Date: Tue, 28 Mar 2023 21:24:20 +0100 Subject: x86: Merge struct msr_policy into struct cpu_policy As with the cpuid side, use a temporary define to make struct msr_policy still work. Note, this means that domains now have two separate struct cpu_policy allocations with disjoint information, and system policies are in a similar position, as well as xc_cpu_policy objects in libxenguest. All of these duplications will be addressed in the following patches. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> --- a/xen/include/asm-x86/cpu-policy.h +++ b/xen/include/asm-x86/cpu-policy.h @@ -2,7 +2,6 @@ #define __X86_CPU_POLICY_H__ #include <asm/cpuid-autogen.h> -#include <asm/msr.h> #define FEATURESET_1d 0 /* 0x00000001.edx */ #define FEATURESET_1c 1 /* 0x00000001.ecx */ @@ -277,6 +276,28 @@ struct cpu_policy }; } extd; + /* + * 0x0000010a - MSR_ARCH_CAPABILITIES + * + * This is an Intel-only MSR, which provides miscellaneous enumeration, + * including those which indicate that microarchitectrual sidechannels are + * fixed in hardware. + */ + union { + uint32_t raw; + struct { + bool rdcl_no:1; + bool ibrs_all:1; + bool rsba:1; + bool skip_l1dfl:1; + bool ssb_no:1; + bool mds_no:1; + bool if_pschange_mc_no:1; + bool tsx_ctrl:1; + bool taa_no:1; + }; + } arch_caps; + #undef __DECL_BITFIELD #undef _DECL_BITFIELD #undef DECL_BITFIELD @@ -290,6 +311,7 @@ struct cpu_policy /* Temporary */ #define cpuid_policy cpu_policy +#define msr_policy cpu_policy /* Fill in a featureset bitmap from a CPUID policy. */ static inline void cpuid_policy_to_featureset( --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -8,6 +8,8 @@ #include <xen/types.h> #include <xen/percpu.h> #include <xen/errno.h> +#include <xen/kernel.h> +#include <asm/cpu-policy.h> #include <asm/asm_defns.h> #include <asm/cpufeature.h> @@ -224,31 +226,6 @@ static inline void wrmsr_tsc_aux(uint32_ uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp); -/* MSR policy object for shared per-domain MSRs */ -struct msr_policy { - /* - * 0x0000010a - MSR_ARCH_CAPABILITIES - * - * This is an Intel-only MSR, which provides miscellaneous enumeration, - * including those which indicate that microarchitectrual sidechannels are - * fixed in hardware. - */ - union { - uint32_t raw; - struct { - bool rdcl_no:1; - bool ibrs_all:1; - bool rsba:1; - bool skip_l1dfl:1; - bool ssb_no:1; - bool mds_no:1; - bool if_pschange_mc_no:1; - bool tsx_ctrl:1; - bool taa_no:1; - }; - } arch_caps; -}; - #endif /* !__ASSEMBLY__ */ #endif /* __ASM_MSR_H */
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