File 5afc13ae-6-x86-elide-MSR_SPEC_CTRL-handling-in-idle.patch of Package xen.11298

# Commit 94df6e8588e35cc2028ccb3fd2921c6e6360605e
# Date 2018-05-16 12:19:10 +0100
# Author Andrew Cooper <andrew.cooper3@citrix.com>
# Committer Andrew Cooper <andrew.cooper3@citrix.com>
x86/spec_ctrl: Elide MSR_SPEC_CTRL handling in idle context when possible

If Xen is virtualising MSR_SPEC_CTRL handling for guests, but using 0 as its
own MSR_SPEC_CTRL value, spec_ctrl_{enter,exit}_idle() need not write to the
MSR.

Requested-by: Jan Beulich <JBeulich@suse.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -366,6 +366,9 @@ void __cpuinit identify_cpu(struct cpuin
 		if (test_bit(X86_FEATURE_SC_RSB_HVM,
 		             boot_cpu_data.x86_capability))
 			__set_bit(X86_FEATURE_SC_RSB_HVM, c->x86_capability);
+		if (test_bit(X86_FEATURE_SC_MSR_IDLE,
+			     boot_cpu_data.x86_capability))
+			__set_bit(X86_FEATURE_SC_MSR_IDLE, c->x86_capability);
 
 		/* AND the already accumulated flags with these */
 		for ( i = 0 ; i < NCAPINTS ; i++ )
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -313,6 +313,10 @@ void __init init_speculation_mitigations
     /* (Re)init BSP state now that default_spec_ctrl_flags has been calculated. */
     init_shadow_spec_ctrl_state();
 
+    /* If Xen is using any MSR_SPEC_CTRL settings, adjust the idle path. */
+    if ( default_xen_spec_ctrl )
+        __set_bit(X86_FEATURE_SC_MSR_IDLE, boot_cpu_data.x86_capability);
+
     print_details(thunk);
 }
 
--- a/xen/include/asm-x86/cpufeature.h
+++ b/xen/include/asm-x86/cpufeature.h
@@ -68,6 +68,7 @@
 #define X86_FEATURE_IND_THUNK_JMP   (3*32+ 2) /* Use IND_THUNK_JMP */
 #define X86_FEATURE_XEN_IBPB        (3*32+ 3) /* IBRSB || IBPB */
 #define X86_FEATURE_SC_MSR          (3*32+ 4) /* MSR_SPEC_CTRL used by Xen */
+#define X86_FEATURE_SC_MSR_IDLE     (3*32+ 5) /* SC_MSR && default_xen_spec_ctrl */
 #define X86_FEATURE_MFENCE_RDTSC (3*32+ 7) /* MFENCE synchronizes RDTSC */
 #define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
 #define X86_FEATURE_NONSTOP_TSC	(3*32+ 9) /* TSC does not stop in C states */
--- a/xen/include/asm-x86/spec_ctrl.h
+++ b/xen/include/asm-x86/spec_ctrl.h
@@ -56,7 +56,7 @@ static always_inline void spec_ctrl_ente
     barrier();
     asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", %c3)
                    :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0),
-                      "i" (X86_FEATURE_SC_MSR)
+                      "i" (X86_FEATURE_SC_MSR_IDLE)
                    : "memory" );
 }
 
@@ -73,7 +73,7 @@ static always_inline void spec_ctrl_exit
     barrier();
     asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", %c3)
                    :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0),
-                      "i" (X86_FEATURE_SC_MSR)
+                      "i" (X86_FEATURE_SC_MSR_IDLE)
                    : "memory" );
 }