File 5a534c78-x86-dont-use-incorrect-CPUID-values-for-topology.patch of Package xen.8005

# Commit d51baf310e530659f73e714acf575555bdc46303
# Date 2018-01-08 10:48:24 +0000
# Author Jan H. Schönherr <jschoenh@amazon.de>
# Committer Andrew Cooper <andrew.cooper3@citrix.com>
x86: Don't use potentially incorrect CPUID values for topology information

Intel says for CPUID leaf 0Bh:

  "Software must not use EBX[15:0] to enumerate processor
   topology of the system. This value in this field
   (EBX[15:0]) is only intended for display/diagnostic
   purposes. The actual number of logical processors
   available to BIOS/OS/Applications may be different from
   the value of EBX[15:0], depending on software and platform
   hardware configurations."

And yet, we're using them to derive the number cores in a package
and the number of siblings in a core.

Derive the number of siblings and cores from EAX instead, which is
intended for that.

Signed-off-by: Jan H. Schönherr <jschoenh@amazon.de>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>

--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -407,8 +407,8 @@ void __cpuinit detect_extended_topology(
 	initial_apicid = edx;
 
 	/* Populate HT related information from sub-leaf level 0 */
-	core_level_siblings = c->x86_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
 	core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
+	core_level_siblings = c->x86_num_siblings = 1u << ht_mask_width;
 
 	sub_index = 1;
 	do {
@@ -416,8 +416,8 @@ void __cpuinit detect_extended_topology(
 
 		/* Check for the Core type in the implemented sub leaves */
 		if ( LEAFB_SUBTYPE(ecx) == CORE_TYPE ) {
-			core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
 			core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
+			core_level_siblings = 1u << core_plus_mask_width;
 			break;
 		}