File 5aec7393-2-x86-xpti-write-cr3.patch of Package xen.8005

From cda05dcae6732fc9c5b782a97a09b5a0f0dd4b81 Mon Sep 17 00:00:00 2001
From: Juergen Gross <jgross@suse.com>
Date: Thu, 26 Apr 2018 13:33:11 +0200
Subject: [PATCH] xen/x86: add a function for modifying cr3

Instead of having multiple places with more or less identical asm
statements just have one function doing a write to cr3.

As this function should be named write_cr3() rename the current
write_cr3() function to switch_cr3().

Suggested-by: Andrew Copper <andrew.cooper3@citrix.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/arch/x86/efi/runtime.c
+++ b/xen/arch/x86/efi/runtime.c
@@ -104,7 +104,7 @@ struct efi_rs_state efi_rs_enter(void)
         asm volatile ( "lgdt %0" : : "m" (gdt_desc) );
     }
 
-    write_cr3(virt_to_maddr(efi_l4_pgtable));
+    switch_cr3(virt_to_maddr(efi_l4_pgtable));
 
     return state;
 }
@@ -113,7 +113,7 @@ void efi_rs_leave(struct efi_rs_state *s
 {
     if ( !state->cr3 )
         return;
-    write_cr3(state->cr3);
+    switch_cr3(state->cr3);
     if ( is_pv_vcpu(current) && !is_idle_vcpu(current) )
     {
         struct desc_ptr gdt_desc = {
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -73,7 +73,7 @@ static void post_flush(u32 t)
     this_cpu(tlbflush_time) = t;
 }
 
-void write_cr3(unsigned long cr3)
+void switch_cr3(unsigned long cr3)
 {
     unsigned long flags;
     u32 t;
@@ -87,11 +87,11 @@ void write_cr3(unsigned long cr3)
     {
         unsigned long cr4 = read_cr4();
         write_cr4(cr4 & ~X86_CR4_PGE);
-        asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" );
+        write_cr3(cr3);
         write_cr4(cr4);
     }
 #else
-    asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" );
+    write_cr3(cr3);
 #endif
 
     post_flush(t);
@@ -128,8 +128,7 @@ void flush_area_local(const void *va, un
 #ifndef USER_MAPPINGS_ARE_GLOBAL
             if ( !(flags & FLUSH_TLB_GLOBAL) || !(read_cr4() & X86_CR4_PGE) )
             {
-                asm volatile ( "mov %0, %%cr3"
-                               : : "r" (read_cr3()) : "memory" );
+                write_cr3(read_cr3());
             }
             else
 #endif
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -499,7 +499,7 @@ void make_cr3(struct vcpu *v, unsigned l
 void write_ptbase(struct vcpu *v)
 {
     get_cpu_info()->root_pgt_changed = 1;
-    write_cr3(v->arch.cr3);
+    switch_cr3(v->arch.cr3);
 }
 
 /*
--- a/xen/arch/x86/x86_64/traps.c
+++ b/xen/arch/x86/x86_64/traps.c
@@ -289,7 +289,7 @@ void toggle_guest_pt(struct vcpu *v)
 
 #ifdef USER_MAPPINGS_ARE_GLOBAL
     /* Don't flush user global mappings from the TLB. Don't tick TLB clock. */
-    asm volatile ( "mov %0, %%cr3" : : "r" (v->arch.cr3) : "memory" );
+    write_cr3(v->arch.cr3);
 #else
     write_ptbase(v);
 #endif
--- a/xen/include/asm-x86/flushtlb.h
+++ b/xen/include/asm-x86/flushtlb.h
@@ -84,7 +84,7 @@ static inline unsigned long read_cr3(voi
 }
 
 /* Write pagetable base and implicitly tick the tlbflush clock. */
-void write_cr3(unsigned long cr3);
+void switch_cr3(unsigned long cr3);
 
 /* flush_* flag fields: */
  /*
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -309,6 +309,11 @@ static inline unsigned long read_cr2(voi
     return cr2;
 }
 
+static inline void write_cr3(unsigned long val)
+{
+    asm volatile ( "mov %0, %%cr3" : : "r" (val) : "memory" );
+}
+
 DECLARE_PER_CPU(unsigned long, cr4);
 
 static inline unsigned long read_cr4(void)