File 5b02c786-x86-msr-virtualise-SPEC_CTRL-SSBD.patch of Package xen.7652

# Commit cd53023df952cf0084be9ee3d15a90f8837049c2
# Date 2018-05-21 14:20:06 +0100
# Author Andrew Cooper <andrew.cooper3@citrix.com>
# Committer Andrew Cooper <andrew.cooper3@citrix.com>
x86/msr: Virtualise MSR_SPEC_CTRL.SSBD for guests to use

Almost all infrastructure is already in place.  Update the reserved bits
calculation in guest_wrmsr(), and offer SSBD to guests by default.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>

--- sle12sp2.orig/xen/arch/x86/domctl.c	2018-03-28 16:33:59.000000000 +0200
+++ sle12sp2/xen/arch/x86/domctl.c	2018-05-23 11:23:31.000000000 +0200
@@ -1365,7 +1365,8 @@ long arch_do_domctl(
                      * ignored) when STIBP isn't enumerated in hardware.
                      */
 
-                    if ( msr.value & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) )
+                    if ( msr.value & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP |
+                                       (boot_cpu_has(X86_FEATURE_SSBD) ? SPEC_CTRL_SSBD : 0)) )
                         break;
                     v->arch.spec_ctrl = msr.value;
                     continue;
--- sle12sp2.orig/xen/arch/x86/hvm/hvm.c	2018-05-23 12:22:17.013919110 +0200
+++ sle12sp2/xen/arch/x86/hvm/hvm.c	2018-05-23 13:47:50.559776737 +0200
@@ -3994,7 +3994,9 @@ int hvm_msr_write_intercept(unsigned int
          * when STIBP isn't enumerated in hardware.
          */
 
-        if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) )
+        if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP |
+                             (edx & cpufeat_mask(X86_FEATURE_SSBD)
+                              ? SPEC_CTRL_SSBD : 0)) )
             goto gp_fault; /* Rsvd bit set? */
 
         v->arch.spec_ctrl = msr_content;
--- sle12sp2.orig/xen/arch/x86/traps.c	2018-05-23 12:22:17.013919110 +0200
+++ sle12sp2/xen/arch/x86/traps.c	2018-05-23 11:23:31.000000000 +0200
@@ -2906,7 +2906,9 @@ static int emulate_privileged_op(struct
              * when STIBP isn't enumerated in hardware.
              */
 
-            if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) )
+            if ( msr_content & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP |
+                                 (edx & cpufeat_mask(X86_FEATURE_SSBD)
+                                  ? SPEC_CTRL_SSBD : 0)) )
                 goto fail; /* Rsvd bit set? */
 
             v->arch.spec_ctrl = eax;
--- sle12sp2.orig/xen/include/public/arch-x86/cpufeatureset.h	2018-05-23 11:22:26.000000000 +0200
+++ sle12sp2/xen/include/public/arch-x86/cpufeatureset.h	2018-05-23 11:23:31.000000000 +0200
@@ -230,7 +230,7 @@ XEN_CPUFEATURE(IBPB,          8*32+12) /
 XEN_CPUFEATURE(IBRSB,         9*32+26) /*A  IBRS and IBPB support (used by Intel) */
 XEN_CPUFEATURE(STIBP,         9*32+27) /*A! STIBP */
 XEN_CPUFEATURE(ARCH_CAPS,     9*32+29) /*   IA32_ARCH_CAPABILITIES MSR */
-XEN_CPUFEATURE(SSBD,          9*32+31) /*   MSR_SPEC_CTRL.SSBD available */
+XEN_CPUFEATURE(SSBD,          9*32+31) /*A  MSR_SPEC_CTRL.SSBD available */
 
 #endif /* XEN_CPUFEATURE */