File binutils-revert-hlasm-insns.diff of Package cross-rx-binutils

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File binutils-revert-hlasm-insns.diff of Package cross-rx-binutils (Revision 5d04a289bd51eb37c5d6de5a2502a748)

Currently displaying revision 5d04a289bd51eb37c5d6de5a2502a748 , Show latest

This reverts commit b10b530a4566, because generating 'jgnop'
from 'bcrl' confuses some parsing tools (in particular kernels
recordmcount.pl tool) on s390x.

Due to the way the assembler and disassembler are implemented we need
to disable both, the assembly and disassembly of the problematic
mnemonic (that's only a problem for jgnop vs brcl, but still).
So, just revert the whole commit.

v2: this adjusts the reversion of above commit to care for commit
0cfd6cffde32726ca69cde6ed3cc1ece21b9cf7c that changes the touched
testcases so that it applies again, so it's not a simple revert of
above commit anymore.

(We leave out the patch to ChangeLog in the reversion)

Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.d
===================================================================
--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-g5.d	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.d	2022-05-13 17:56:06.000000000 +0200
@@ -78,14 +78,10 @@ Disassembly of section .text:
 .*:	07 29 [	 ]*bhr	%r9
 .*:	07 f9 [	 ]*br	%r9
 .*:	a7 95 00 00 [	 ]*bras	%r9,e2 <foo\+0xe2>
-.*:	a7 65 00 00 [	 ]*bras	%r6,e6 <foo\+0xe6>
-.*:	a7 64 00 00 [	 ]*jlh	ea <foo\+0xea>
-.*:	a7 66 00 00 [	 ]*brct	%r6,ee <foo\+0xee>
-.*:	a7 66 00 00 [	 ]*brct	%r6,f2 <foo\+0xf2>
-.*:	84 69 00 00 [	 ]*brxh	%r6,%r9,f6 <foo\+0xf6>
-.*:	84 69 00 00 [	 ]*brxh	%r6,%r9,fa <foo\+0xfa>
-.*:	85 69 00 00 [	 ]*brxle	%r6,%r9,fe <foo\+0xfe>
-.*:	85 69 00 00 [	 ]*brxle	%r6,%r9,102 <foo\+0x102>
+.*:	a7 64 00 00 [	 ]*jlh	e6 <foo\+0xe6>
+.*:	a7 66 00 00 [	 ]*brct	%r6,ea <foo\+0xea>
+.*:	84 69 00 00 [	 ]*brxh	%r6,%r9,ee <foo\+0xee>
+.*:	85 69 00 00 [	 ]*brxle	%r6,%r9,f2 <foo\+0xf2>
 .*:	b2 5a 00 69 [	 ]*bsa	%r6,%r9
 .*:	b2 58 00 69 [	 ]*bsg	%r6,%r9
 .*:	0b 69 [	 ]*bsm	%r6,%r9
@@ -184,49 +180,27 @@ Disassembly of section .text:
 .*:	b2 21 00 69 [	 ]*ipte	%r6,%r9
 .*:	b2 29 00 69 [	 ]*iske	%r6,%r9
 .*:	b2 23 00 69 [	 ]*ivsk	%r6,%r9
-.*:	a7 f4 00 00 [	 ]*j	288 <foo\+0x288>
-.*:	a7 84 00 00 [	 ]*je	28c <foo\+0x28c>
-.*:	a7 24 00 00 [	 ]*jh	290 <foo\+0x290>
-.*:	a7 a4 00 00 [	 ]*jhe	294 <foo\+0x294>
-.*:	a7 44 00 00 [	 ]*jl	298 <foo\+0x298>
-.*:	a7 c4 00 00 [	 ]*jle	29c <foo\+0x29c>
-.*:	a7 64 00 00 [	 ]*jlh	2a0 <foo\+0x2a0>
-.*:	a7 44 00 00 [	 ]*jl	2a4 <foo\+0x2a4>
-.*:	a7 74 00 00 [	 ]*jne	2a8 <foo\+0x2a8>
-.*:	a7 d4 00 00 [	 ]*jnh	2ac <foo\+0x2ac>
-.*:	a7 54 00 00 [	 ]*jnhe	2b0 <foo\+0x2b0>
-.*:	a7 b4 00 00 [	 ]*jnl	2b4 <foo\+0x2b4>
-.*:	a7 34 00 00 [	 ]*jnle	2b8 <foo\+0x2b8>
-.*:	a7 94 00 00 [	 ]*jnlh	2bc <foo\+0x2bc>
-.*:	a7 b4 00 00 [	 ]*jnl	2c0 <foo\+0x2c0>
-.*:	a7 e4 00 00 [	 ]*jno	2c4 <foo\+0x2c4>
-.*:	a7 d4 00 00 [	 ]*jnh	2c8 <foo\+0x2c8>
-.*:	a7 74 00 00 [	 ]*jne	2cc <foo\+0x2cc>
-.*:	a7 14 00 00 [	 ]*jo	2d0 <foo\+0x2d0>
-.*:	a7 24 00 00 [	 ]*jh	2d4 <foo\+0x2d4>
-.*:	a7 84 00 00 [	 ]*je	2d8 <foo\+0x2d8>
-.*:	a7 04 00 00 [	 ]*jnop	2dc <foo\+0x2dc>
-.*:	a7 14 00 00 [	 ]*jo	2e0 <foo\+0x2e0>
-.*:	a7 24 00 00 [	 ]*jh	2e4 <foo\+0x2e4>
-.*:	a7 24 00 00 [	 ]*jh	2e8 <foo\+0x2e8>
-.*:	a7 34 00 00 [	 ]*jnle	2ec <foo\+0x2ec>
-.*:	a7 44 00 00 [	 ]*jl	2f0 <foo\+0x2f0>
-.*:	a7 44 00 00 [	 ]*jl	2f4 <foo\+0x2f4>
-.*:	a7 54 00 00 [	 ]*jnhe	2f8 <foo\+0x2f8>
-.*:	a7 64 00 00 [	 ]*jlh	2fc <foo\+0x2fc>
-.*:	a7 74 00 00 [	 ]*jne	300 <foo\+0x300>
-.*:	a7 74 00 00 [	 ]*jne	304 <foo\+0x304>
-.*:	a7 84 00 00 [	 ]*je	308 <foo\+0x308>
-.*:	a7 84 00 00 [	 ]*je	30c <foo\+0x30c>
-.*:	a7 94 00 00 [	 ]*jnlh	310 <foo\+0x310>
-.*:	a7 a4 00 00 [	 ]*jhe	314 <foo\+0x314>
-.*:	a7 b4 00 00 [	 ]*jnl	318 <foo\+0x318>
-.*:	a7 b4 00 00 [	 ]*jnl	31c <foo\+0x31c>
-.*:	a7 c4 00 00 [	 ]*jle	320 <foo\+0x320>
-.*:	a7 d4 00 00 [	 ]*jnh	324 <foo\+0x324>
-.*:	a7 d4 00 00 [	 ]*jnh	328 <foo\+0x328>
-.*:	a7 e4 00 00 [	 ]*jno	32c <foo\+0x32c>
-.*:	a7 f4 00 00 [	 ]*j	330 <foo\+0x330>
+.*:	a7 f4 00 00 [	 ]*j	278 <foo\+0x278>
+.*:	a7 84 00 00 [	 ]*je	27c <foo\+0x27c>
+.*:	a7 24 00 00 [	 ]*jh	280 <foo\+0x280>
+.*:	a7 a4 00 00 [	 ]*jhe	284 <foo\+0x284>
+.*:	a7 44 00 00 [	 ]*jl	288 <foo\+0x288>
+.*:	a7 c4 00 00 [	 ]*jle	28c <foo\+0x28c>
+.*:	a7 64 00 00 [	 ]*jlh	290 <foo\+0x290>
+.*:	a7 44 00 00 [	 ]*jl	294 <foo\+0x294>
+.*:	a7 74 00 00 [	 ]*jne	298 <foo\+0x298>
+.*:	a7 d4 00 00 [	 ]*jnh	29c <foo\+0x29c>
+.*:	a7 54 00 00 [	 ]*jnhe	2a0 <foo\+0x2a0>
+.*:	a7 b4 00 00 [	 ]*jnl	2a4 <foo\+0x2a4>
+.*:	a7 34 00 00 [	 ]*jnle	2a8 <foo\+0x2a8>
+.*:	a7 94 00 00 [	 ]*jnlh	2ac <foo\+0x2ac>
+.*:	a7 b4 00 00 [	 ]*jnl	2b0 <foo\+0x2b0>
+.*:	a7 e4 00 00 [	 ]*jno	2b4 <foo\+0x2b4>
+.*:	a7 d4 00 00 [	 ]*jnh	2b8 <foo\+0x2b8>
+.*:	a7 74 00 00 [	 ]*jne	2bc <foo\+0x2bc>
+.*:	a7 14 00 00 [	 ]*jo	2c0 <foo\+0x2c0>
+.*:	a7 24 00 00 [	 ]*jh	2c4 <foo\+0x2c4>
+.*:	a7 84 00 00 [	 ]*je	2c8 <foo\+0x2c8>
 .*:	ed 65 af ff 00 18 [	 ]*kdb	%f6,4095\(%r5,%r10\)
 .*:	b3 18 00 69 [	 ]*kdbr	%f6,%f9
 .*:	ed 65 af ff 00 08 [	 ]*keb	%f6,4095\(%r5,%r10\)
@@ -509,4 +483,4 @@ Disassembly of section .text:
 .*:	f8 58 5f ff af ff [	 ]*zap	4095\(6,%r5\),4095\(9,%r10\)
 .*:	b2 21 b0 69 [	 ]*ipte	%r6,%r9,%r11
 .*:	b2 21 bd 69 [	 ]*ipte	%r6,%r9,%r11,13
-.*:	07 07 [	 ]*nopr	%r7
+.*:	07 07 [ 	]*nopr	%r7
Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.s
===================================================================
--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-g5.s	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/gas/testsuite/gas/s390/esa-g5.s	2022-05-13 17:56:06.000000000 +0200
@@ -72,14 +72,10 @@ foo:
 	bpr	%r9
 	br	%r9
 	bras	%r9,.
-	jas	%r6,.
 	brc	6,.
 	brct	6,.
-	jct	%r6,.
 	brxh	%r6,%r9,.
-	jxh	%r6,%r9,.
 	brxle	%r6,%r9,.
-	jxle	%r6,%r9,.
 	bsa	%r6,%r9
 	bsg	%r6,%r9
 	bsm	%r6,%r9
@@ -199,28 +195,6 @@ foo:
 	jo	.
 	jp	.
 	jz	.
-	jnop	.
-	bro	.
-	brh	.
-	brp	.
-	brnle	.
-	brl	.
-	brm	.
-	brnhe	.
-	brlh	.
-	brne	.
-	brnz	.
-	bre	.
-	brz	.
-	brnlh	.
-	brhe	.
-	brnl	.
-	brnm	.
-	brle	.
-	brnh	.
-	brnp	.
-	brno	.
-	bru	.
 	kdb	%f6,4095(%r5,%r10)
 	kdbr	%f6,%f9
 	keb	%f6,4095(%r5,%r10)
Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.d
===================================================================
--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-z900.d	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.d	2022-05-13 18:07:33.000000000 +0200
@@ -6,56 +6,31 @@
 Disassembly of section .text:
 
 .* <foo>:
-.*:	c0 f4 00 00 00 00 [	 ]*jg	0 <foo>
-.*:	c0 04 00 00 00 00 [	 ]*jgnop	6 <foo\+0x6>
-.*:	c0 14 00 00 00 00 [	 ]*jgo	c <foo\+0xc>
-.*:	c0 24 00 00 00 00 [	 ]*jgh	12 <foo\+0x12>
-.*:	c0 24 00 00 00 00 [	 ]*jgh	18 <foo\+0x18>
-.*:	c0 34 00 00 00 00 [	 ]*jgnle	1e <foo\+0x1e>
-.*:	c0 44 00 00 00 00 [	 ]*jgl	24 <foo\+0x24>
-.*:	c0 44 00 00 00 00 [	 ]*jgl	2a <foo\+0x2a>
-.*:	c0 54 00 00 00 00 [	 ]*jgnhe	30 <foo\+0x30>
-.*:	c0 64 00 00 00 00 [	 ]*jglh	36 <foo\+0x36>
-.*:	c0 74 00 00 00 00 [	 ]*jgne	3c <foo\+0x3c>
-.*:	c0 74 00 00 00 00 [	 ]*jgne	42 <foo\+0x42>
-.*:	c0 84 00 00 00 00 [	 ]*jge	48 <foo\+0x48>
-.*:	c0 84 00 00 00 00 [	 ]*jge	4e <foo\+0x4e>
-.*:	c0 94 00 00 00 00 [	 ]*jgnlh	54 <foo\+0x54>
-.*:	c0 a4 00 00 00 00 [	 ]*jghe	5a <foo\+0x5a>
-.*:	c0 b4 00 00 00 00 [	 ]*jgnl	60 <foo\+0x60>
-.*:	c0 b4 00 00 00 00 [	 ]*jgnl	66 <foo\+0x66>
-.*:	c0 c4 00 00 00 00 [	 ]*jgle	6c <foo\+0x6c>
-.*:	c0 d4 00 00 00 00 [	 ]*jgnh	72 <foo\+0x72>
-.*:	c0 d4 00 00 00 00 [	 ]*jgnh	78 <foo\+0x78>
-.*:	c0 e4 00 00 00 00 [	 ]*jgno	7e <foo\+0x7e>
-.*:	c0 f4 00 00 00 00 [	 ]*jg	84 <foo\+0x84>
-.*:	c0 14 00 00 00 00 [	 ]*jgo	8a <foo\+0x8a>
-.*:	c0 24 00 00 00 00 [	 ]*jgh	90 <foo\+0x90>
-.*:	c0 24 00 00 00 00 [	 ]*jgh	96 <foo\+0x96>
-.*:	c0 34 00 00 00 00 [	 ]*jgnle	9c <foo\+0x9c>
-.*:	c0 44 00 00 00 00 [	 ]*jgl	a2 <foo\+0xa2>
-.*:	c0 44 00 00 00 00 [	 ]*jgl	a8 <foo\+0xa8>
-.*:	c0 54 00 00 00 00 [	 ]*jgnhe	ae <foo\+0xae>
-.*:	c0 64 00 00 00 00 [	 ]*jglh	b4 <foo\+0xb4>
-.*:	c0 74 00 00 00 00 [	 ]*jgne	ba <foo\+0xba>
-.*:	c0 74 00 00 00 00 [	 ]*jgne	c0 <foo\+0xc0>
-.*:	c0 84 00 00 00 00 [	 ]*jge	c6 <foo\+0xc6>
-.*:	c0 84 00 00 00 00 [	 ]*jge	cc <foo\+0xcc>
-.*:	c0 94 00 00 00 00 [	 ]*jgnlh	d2 <foo\+0xd2>
-.*:	c0 a4 00 00 00 00 [	 ]*jghe	d8 <foo\+0xd8>
-.*:	c0 b4 00 00 00 00 [	 ]*jgnl	de <foo\+0xde>
-.*:	c0 b4 00 00 00 00 [	 ]*jgnl	e4 <foo\+0xe4>
-.*:	c0 c4 00 00 00 00 [	 ]*jgle	ea <foo\+0xea>
-.*:	c0 d4 00 00 00 00 [	 ]*jgnh	f0 <foo\+0xf0>
-.*:	c0 d4 00 00 00 00 [	 ]*jgnh	f6 <foo\+0xf6>
-.*:	c0 e4 00 00 00 00 [	 ]*jgno	fc <foo\+0xfc>
-.*:	c0 f4 00 00 00 00 [	 ]*jg	102 <foo\+0x102>
-.*:	c0 65 00 00 00 00 [	 ]*brasl	%r6,108 <foo\+0x108>
-.*:	c0 65 00 00 00 00 [	 ]*brasl	%r6,10e <foo\+0x10e>
-.*:	c0 65 80 00 00 00 [	 ]*brasl	%r6,114 <foo\+0x114>
-.*:	c0 65 80 00 00 00 [	 ]*brasl	%r6,11a <foo\+0x11a>
-.*:	c0 65 7f ff ff ff [	 ]*brasl	%r6,11e <foo\+0x11e>
-.*:	c0 65 7f ff ff ff [	 ]*brasl	%r6,124 <foo\+0x124>
+.*:	c0 f4 00 00 00 00 [	 ]*jg	0 \<foo\>
+.*:	c0 14 00 00 00 00 [	 ]*jgo	6 \<foo\+0x6>
+.*:	c0 24 00 00 00 00 [	 ]*jgh	c \<foo\+0xc>
+.*:	c0 24 00 00 00 00 [	 ]*jgh	12 \<foo\+0x12>
+.*:	c0 34 00 00 00 00 [	 ]*jgnle	18 \<foo\+0x18>
+.*:	c0 44 00 00 00 00 [	 ]*jgl	1e \<foo\+0x1e>
+.*:	c0 44 00 00 00 00 [	 ]*jgl	24 \<foo\+0x24>
+.*:	c0 54 00 00 00 00 [	 ]*jgnhe	2a \<foo\+0x2a>
+.*:	c0 64 00 00 00 00 [	 ]*jglh	30 \<foo\+0x30>
+.*:	c0 74 00 00 00 00 [	 ]*jgne	36 \<foo\+0x36>
+.*:	c0 74 00 00 00 00 [	 ]*jgne	3c \<foo\+0x3c>
+.*:	c0 84 00 00 00 00 [	 ]*jge	42 \<foo\+0x42>
+.*:	c0 84 00 00 00 00 [	 ]*jge	48 \<foo\+0x48>
+.*:	c0 94 00 00 00 00 [	 ]*jgnlh	4e \<foo\+0x4e>
+.*:	c0 a4 00 00 00 00 [	 ]*jghe	54 \<foo\+0x54>
+.*:	c0 b4 00 00 00 00 [	 ]*jgnl	5a \<foo\+0x5a>
+.*:	c0 b4 00 00 00 00 [	 ]*jgnl	60 \<foo\+0x60>
+.*:	c0 c4 00 00 00 00 [	 ]*jgle	66 \<foo\+0x66>
+.*:	c0 d4 00 00 00 00 [	 ]*jgnh	6c \<foo\+0x6c>
+.*:	c0 d4 00 00 00 00 [	 ]*jgnh	72 \<foo\+0x72>
+.*:	c0 e4 00 00 00 00 [	 ]*jgno	78 \<foo\+0x78>
+.*:	c0 f4 00 00 00 00 [	 ]*jg	7e \<foo\+0x7e>
+.*:	c0 65 00 00 00 00 [	 ]*brasl	%r6,84 \<foo\+0x84>
+.*:	c0 65 80 00 00 00 [	 ]*brasl	%r6,8a <foo\+0x8a>
+.*:	c0 65 7f ff ff ff [	 ]*brasl	%r6,8e <foo\+0x8e>
 .*:	01 0b [	 ]*tam
 .*:	01 0c [	 ]*sam24
 .*:	01 0d [	 ]*sam31
@@ -66,7 +41,7 @@ Disassembly of section .text:
 .*:	b9 97 00 69 [	 ]*dlr	%r6,%r9
 .*:	b9 98 00 69 [	 ]*alcr	%r6,%r9
 .*:	b9 99 00 69 [	 ]*slbr	%r6,%r9
-.*:	c0 60 00 00 00 00 [	 ]*larl	%r6,14e <foo\+0x14e>
+.*:	c0 60 00 00 00 00 [	 ]*larl	%r6,b8 <foo\+0xb8>
 .*:	e3 65 af ff 00 1e [	 ]*lrv	%r6,4095\(%r5,%r10\)
 .*:	e3 65 af ff 00 1f [	 ]*lrvh	%r6,4095\(%r5,%r10\)
 .*:	e3 65 af ff 00 3e [	 ]*strv	%r6,4095\(%r5,%r10\)
@@ -76,4 +51,3 @@ Disassembly of section .text:
 .*:	e3 65 af ff 00 98 [	 ]*alc	%r6,4095\(%r5,%r10\)
 .*:	e3 65 af ff 00 99 [	 ]*slb	%r6,4095\(%r5,%r10\)
 .*:	eb 69 5f ff 00 1d [	 ]*rll	%r6,%r9,4095\(%r5\)
-.*:	07 07 [	 ]*nopr	%r7
Index: binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.s
===================================================================
--- binutils-2.38.50.orig/gas/testsuite/gas/s390/esa-z900.s	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/gas/testsuite/gas/s390/esa-z900.s	2022-05-13 17:57:59.000000000 +0200
@@ -1,7 +1,6 @@
 .text
 foo:
 	brcl	15,.
-	jgnop	.
 	jgo	.
 	jgh	.
 	jgp	.
@@ -23,33 +22,9 @@ foo:
 	jgnp	.
 	jgno	.
 	jg	.
-	brol	.
-	brhl	.
-	brpl	.
-	brnlel	.
-	brll	.
-	brml	.
-	brnhel	.
-	brlhl	.
-	brnel	.
-	brnzl	.
-	brel	.
-	brzl	.
-	brnlhl	.
-	brhel	.
-	brnll	.
-	brnml	.
-	brlel	.
-	brnhl	.
-	brnpl	.
-	brnol	.
-	brul	.
 	brasl	%r6,.
-	jasl	%r6,.
 	brasl	%r6,.-0x100000000
-	jasl	%r6,.-0x100000000
 	brasl	%r6,.+0xfffffffe
-	jasl	%r6,.+0xfffffffe
 	tam
 	sam24
 	sam31
Index: binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.d
===================================================================
--- binutils-2.38.50.orig/gas/testsuite/gas/s390/zarch-z900.d	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.d	2022-05-13 17:56:06.000000000 +0200
@@ -20,11 +20,8 @@ Disassembly of section .text:
 .*:	e3 95 af ff 00 46 [ 	]*bctg	%r9,4095\(%r5,%r10\)
 .*:	b9 46 00 96 [ 	]*bctgr	%r9,%r6
 .*:	a7 97 00 00 [	 ]*brctg	%r9,40 \<foo\+0x40\>
-.*:	a7 67 00 00 [	 ]*brctg	%r6,44 <foo\+0x44>
-.*:	ec 96 00 00 00 44 [ 	]*brxhg	%r9,%r6,48 <foo\+0x48>
-.*:	ec 69 00 00 00 44 [	 ]*brxhg	%r6,%r9,4e <foo\+0x4e>
-.*:	ec 96 00 00 00 45 [ 	]*brxlg	%r9,%r6,54 <foo\+0x54>
-.*:	ec 69 00 00 00 45 [	 ]*brxlg	%r6,%r9,5a <foo\+0x5a>
+.*:	ec 96 00 00 00 44 [ 	]*brxhg	%r9,%r6,44 <foo\+0x44>
+.*:	ec 96 00 00 00 45 [ 	]*brxlg	%r9,%r6,4a <foo\+0x4a>
 .*:	eb 96 5f ff 00 44 [ 	]*bxhg	%r9,%r6,4095\(%r5\)
 .*:	eb 96 5f ff 00 45 [ 	]*bxleg	%r9,%r6,4095\(%r5\)
 .*:	b3 a5 00 96 [ 	]*cdgbr	%f9,%r6
Index: binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.s
===================================================================
--- binutils-2.38.50.orig/gas/testsuite/gas/s390/zarch-z900.s	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/gas/testsuite/gas/s390/zarch-z900.s	2022-05-13 17:56:06.000000000 +0200
@@ -14,11 +14,8 @@ foo:
 	bctg	%r9,4095(%r5,%r10)
 	bctgr	%r9,%r6
 	brctg	%r9,.
-	jctg	%r6,.
 	brxhg	%r9,%r6,.
-	jxhg	%r6,%r9,.
 	brxlg	%r9,%r6,.
-	jxleg	%r6,%r9,.
 	bxhg	%r9,%r6,4095(%r5)
 	bxleg	%r9,%r6,4095(%r5)
 	cdgbr	%f9,%r6
Index: binutils-2.38.50/ld/testsuite/ld-s390/tlsbin_64.dd
===================================================================
--- binutils-2.38.50.orig/ld/testsuite/ld-s390/tlsbin_64.dd	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/ld/testsuite/ld-s390/tlsbin_64.dd	2022-05-13 17:56:06.000000000 +0200
@@ -87,26 +87,26 @@ Disassembly of section .text:
  +[0-9a-f]+:	41 22 90 00       	la	%r2,0\(%r2,%r9\)
 # GD -> LE with global variable defined in executable
  +[0-9a-f]+:	e3 20 d0 10 00 04 	lg	%r2,16\(%r13\)
- +[0-9a-f]+:	c0 04 00 00 00 00 	jgnop	[0-9a-f]+ <fn2\+0xca>
+ +[0-9a-f]+:	c0 04 00 00 00 00 	brcl	0,[0-9a-f]+ <fn2\+0xca>
  +[0-9a-f]+:	41 22 90 00       	la	%r2,0\(%r2,%r9\)
 # GD -> LE with local variable defined in executable
  +[0-9a-f]+:	e3 20 d0 18 00 04 	lg	%r2,24\(%r13\)
- +[0-9a-f]+:	c0 04 00 00 00 00 	jgnop	[0-9a-f]+ <fn2\+0xda>
+ +[0-9a-f]+:	c0 04 00 00 00 00 	brcl	0,[0-9a-f]+ <fn2\+0xda>
  +[0-9a-f]+:	41 22 90 00       	la	%r2,0\(%r2,%r9\)
 # GD -> LE with hidden variable defined in executable
  +[0-9a-f]+:	e3 20 d0 20 00 04 	lg	%r2,32\(%r13\)
- +[0-9a-f]+:	c0 04 00 00 00 00 	jgnop	[0-9a-f]+ <fn2\+0xea>
+ +[0-9a-f]+:	c0 04 00 00 00 00 	brcl	0,[0-9a-f]+ <fn2\+0xea>
  +[0-9a-f]+:	41 22 90 00       	la	%r2,0\(%r2,%r9\)
 # LD -> LE
  +[0-9a-f]+:	e3 20 d0 28 00 04 	lg	%r2,40\(%r13\)
- +[0-9a-f]+:	c0 04 00 00 00 00 	jgnop	[0-9a-f]+ <fn2\+0xfa>
+ +[0-9a-f]+:	c0 04 00 00 00 00 	brcl	0,[0-9a-f]+ <fn2\+0xfa>
  +[0-9a-f]+:	41 32 90 00       	la	%r3,0\(%r2,%r9\)
  +[0-9a-f]+:	e3 40 d0 30 00 04 	lg	%r4,48\(%r13\)
  +[0-9a-f]+:	41 54 30 00       	la	%r5,0\(%r4,%r3\)
  +[0-9a-f]+:	e3 40 d0 38 00 04 	lg	%r4,56\(%r13\)
  +[0-9a-f]+:	41 54 30 00       	la	%r5,0\(%r4,%r3\)
  +[0-9a-f]+:	e3 20 d0 40 00 04 	lg	%r2,64\(%r13\)
- +[0-9a-f]+:	c0 04 00 00 00 00 	jgnop	[0-9a-f]+ <fn2\+0x11e>
+ +[0-9a-f]+:	c0 04 00 00 00 00 	brcl	0,[0-9a-f]+ <fn2\+0x11e>
  +[0-9a-f]+:	41 32 90 00       	la	%r3,0\(%r2,%r9\)
  +[0-9a-f]+:	e3 40 d0 48 00 04 	lg	%r4,72\(%r13\)
  +[0-9a-f]+:	41 54 30 00       	la	%r5,0\(%r4,%r3\)
Index: binutils-2.38.50/opcodes/s390-opc.txt
===================================================================
--- binutils-2.38.50.orig/opcodes/s390-opc.txt	2022-05-13 17:56:05.000000000 +0200
+++ binutils-2.38.50/opcodes/s390-opc.txt	2022-05-13 17:56:06.000000000 +0200
@@ -246,14 +246,10 @@ d7 xc SS_L0RDRD "exclusive OR" g5 esa,za
 f8 zap SS_LLRDRD "zero and add" g5 esa,zarch
 a70a ahi RI_RI "add halfword immediate" g5 esa,zarch
 84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch
-84 jxh RSI_RRP "branch relative on index high" g5 esa,zarch
 85 brxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch
-85 jxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch
 a705 bras RI_RP "branch relative and save" g5 esa,zarch
-a705 jas RI_RP "branch relative and save" g5 esa,zarch
 a704 brc RI_UP "branch relative on condition" g5 esa,zarch
 a706 brct RI_RP "branch relative on count" g5 esa,zarch
-a706 jct RI_RP "branch relative on count" g5 esa,zarch
 b241 cksm RRE_RR "checksum" g5 esa,zarch
 a70e chi RI_RI "compare halfword immediate" g5 esa,zarch
 a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch
@@ -272,11 +268,8 @@ a701 tml RI_RU "test under mask low" g5
 4700 nop RX_0RRD "no operation" g5 esa,zarch optparm
 4700 b*8 RX_0RRD "conditional branch" g5 esa,zarch
 47f0 b RX_0RRD "unconditional branch" g5 esa,zarch
-a704 jnop RI_0P "nop jump" g5 esa,zarch
 a704 j*8 RI_0P "conditional jump" g5 esa,zarch
-a704 br*8 RI_0P "conditional jump" g5 esa,zarch
 a7f4 j RI_0P "unconditional jump" g5 esa,zarch
-a7f4 bru RI_0P "unconditional jump" g5 esa,zarch
 b34a axbr RRE_FEFE "add extended bfp" g5 esa,zarch
 b31a adbr RRE_FF "add long bfp" g5 esa,zarch
 ed000000001a adb RXE_FRRD "add long bfp" g5 esa,zarch
@@ -444,9 +437,7 @@ e3000000001b slgf RXE_RRRD "subtract log
 e3000000000c msg RXE_RRRD "multiply single 64" z900 zarch
 e3000000001c msgf RXE_RRRD "multiply single 64<32" z900 zarch
 ec0000000044 brxhg RIE_RRP "branch relative on index high 64" z900 zarch
-ec0000000044 jxhg RIE_RRP "branch relative on index high 64" z900 zarch
 ec0000000045 brxlg RIE_RRP "branch relative on index low or equal 64" z900 zarch
-ec0000000045 jxleg RIE_RRP "branch relative on index low or equal 64" z900 zarch
 eb0000000044 bxhg RSE_RRRD "branch on index high 64" z900 zarch
 eb0000000045 bxleg RSE_RRRD "branch on index low or equal 64" z900 zarch
 eb000000000c srlg RSE_RRRD "shift right single logical 64" z900 zarch
@@ -471,15 +462,10 @@ eb0000000080 icmh RSE_RURD "insert chara
 a702 tmhh RI_RU "test under mask high high" z900 zarch
 a703 tmhl RI_RU "test under mask high low" z900 zarch
 c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch
-c004 jgnop RIL_0P "nop jump long" z900 esa,zarch
 c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch
-c004 br*8l RIL_0P "conditional jump long" z900 esa,zarch
 c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch
-c0f4 brul RIL_0P "unconditional jump long" z900 esa,zarch
 c005 brasl RIL_RP "branch relative and save long" z900 esa,zarch
-c005 jasl RIL_RP "branch relative and save long" z900 esa,zarch
 a707 brctg RI_RP "branch relative on count 64" z900 zarch
-a707 jctg RI_RP "branch relative on count 64" z900 zarch
 a709 lghi RI_RI "load halfword immediate 64" z900 zarch
 a70b aghi RI_RI "add halfword immediate 64" z900 zarch
 a70d mghi RI_RI "multiply halfword immediate 64" z900 zarch

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File binutils-revert-hlasm-insns.diff of Package cross-rx-binutils (Revision 5d04a289bd51eb37c5d6de5a2502a748)

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