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SUSE:SLE-15-SP2:Update
xen.9798
5bd076e9-dombuilder-init-vcpu-debug-regs-correc...
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File 5bd076e9-dombuilder-init-vcpu-debug-regs-correctly.patch of Package xen.9798
# Commit 46029da12e5efeca6d957e5793bd34f2965fa0a1 # Date 2018-10-24 14:43:05 +0100 # Author Andrew Cooper <andrew.cooper3@citrix.com> # Committer Andrew Cooper <andrew.cooper3@citrix.com> tools/dombuilder: Initialise vcpu debug registers correctly In particular, initialising %dr6 with the value 0 is buggy, because on hardware supporting Transactional Memory, it will cause the sticky RTM bit to be asserted, even though a debug exception from a transaction hasn't actually been observed. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Roger Pau Monné <roger.pau@citrix.com> Acked-by: Wei Liu <wei.liu2@citrix.com> --- a/tools/libxc/xc_dom_x86.c +++ b/tools/libxc/xc_dom_x86.c @@ -51,6 +51,9 @@ #define X86_CR0_PE 0x01 #define X86_CR0_ET 0x10 +#define X86_DR6_DEFAULT 0xffff0ff0u +#define X86_DR7_DEFAULT 0x00000400u + #define SPECIALPAGE_PAGING 0 #define SPECIALPAGE_ACCESS 1 #define SPECIALPAGE_SHARING 2 @@ -855,6 +858,9 @@ static int vcpu_x86_32(struct xc_dom_ima dom->parms.virt_base + (dom->start_info_pfn) * PAGE_SIZE_X86; ctxt->user_regs.eflags = 1 << 9; /* Interrupt Enable */ + ctxt->debugreg[6] = X86_DR6_DEFAULT; + ctxt->debugreg[7] = X86_DR7_DEFAULT; + ctxt->flags = VGCF_in_kernel_X86_32 | VGCF_online_X86_32; if ( dom->parms.pae == XEN_PAE_EXTCR3 || dom->parms.pae == XEN_PAE_BIMODAL ) @@ -902,6 +908,9 @@ static int vcpu_x86_64(struct xc_dom_ima dom->parms.virt_base + (dom->start_info_pfn) * PAGE_SIZE_X86; ctxt->user_regs.rflags = 1 << 9; /* Interrupt Enable */ + ctxt->debugreg[6] = X86_DR6_DEFAULT; + ctxt->debugreg[7] = X86_DR7_DEFAULT; + ctxt->flags = VGCF_in_kernel_X86_64 | VGCF_online_X86_64; cr3_pfn = xc_dom_p2m(dom, dom->pgtables_seg.pfn); ctxt->ctrlreg[3] = xen_pfn_to_cr3_x86_64(cr3_pfn); @@ -1006,6 +1015,9 @@ static int vcpu_hvm(struct xc_dom_image /* Set the IP. */ bsp_ctx.cpu.rip = dom->parms.phys_entry; + bsp_ctx.cpu.dr6 = X86_DR6_DEFAULT; + bsp_ctx.cpu.dr7 = X86_DR7_DEFAULT; + if ( dom->start_info_seg.pfn ) bsp_ctx.cpu.rbx = dom->start_info_seg.pfn << PAGE_SHIFT;
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