File xsa435-0-27.patch of Package xen.32200
From 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be Mon Sep 17 00:00:00 2001
From: Andrew Cooper <andrew.cooper3@citrix.com>
Date: Mon, 3 Apr 2023 17:48:43 +0100
Subject: x86/boot: Move MSR policy initialisation logic into cpu-policy.c
Switch to the newer cpu_policy nomenclature.
No practical change.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -14,6 +14,69 @@ struct cpu_policy __read_mostly hos
struct cpu_policy __read_mostly pv_max_cpu_policy;
struct cpu_policy __read_mostly hvm_max_cpu_policy;
+static void __init calculate_raw_policy(void)
+{
+ struct cpu_policy *p = &raw_cpu_policy;
+
+ /* 0x000000ce MSR_INTEL_PLATFORM_INFO */
+ /* Was already added by probe_cpuid_faulting() */
+
+ if ( cpu_has_arch_caps )
+ rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw);
+}
+
+static void __init calculate_host_policy(void)
+{
+ struct cpu_policy *p = &host_cpu_policy;
+
+ *p = raw_cpu_policy;
+
+ /* 0x000000ce MSR_INTEL_PLATFORM_INFO */
+ /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
+ p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
+
+ /* Temporary, until we have known_features[] for feature bits in MSRs. */
+ p->arch_caps.raw &=
+ (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA |
+ ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO |
+ ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
+ ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO |
+ ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO |
+ ARCH_CAPS_PBRSB_NO);
+}
+
+static void __init calculate_pv_max_policy(void)
+{
+ struct cpu_policy *p = &pv_max_cpu_policy;
+
+ *p = host_cpu_policy;
+
+ p->arch_caps.raw = 0; /* Not supported yet. */
+}
+
+static void __init calculate_hvm_max_policy(void)
+{
+ struct cpu_policy *p = &hvm_max_cpu_policy;
+
+ *p = host_cpu_policy;
+
+ /* It's always possible to emulate CPUID faulting for HVM guests */
+ p->platform_info.cpuid_faulting = true;
+
+ p->arch_caps.raw = 0; /* Not supported yet. */
+}
+
+void __init init_guest_cpu_policies(void)
+{
+ calculate_raw_policy();
+ calculate_host_policy();
+
+ calculate_pv_max_policy();
+
+ if ( hvm_enabled )
+ calculate_hvm_max_policy();
+}
+
int init_domain_cpu_policy(struct domain *d)
{
struct cpu_policy *p =
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -33,69 +33,6 @@ DEFINE_PER_CPU(uint32_t, tsc_aux);
struct vcpu_msrs __read_mostly hvm_max_vcpu_msrs,
__read_mostly pv_max_vcpu_msrs;
-static void __init calculate_raw_policy(void)
-{
- struct msr_policy *mp = &raw_cpu_policy;
-
- /* 0x000000ce MSR_INTEL_PLATFORM_INFO */
- /* Was already added by probe_cpuid_faulting() */
-
- if ( cpu_has_arch_caps )
- rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw);
-}
-
-static void __init calculate_host_policy(void)
-{
- struct msr_policy *mp = &host_cpu_policy;
-
- *mp = raw_cpu_policy;
-
- /* 0x000000ce MSR_INTEL_PLATFORM_INFO */
- /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
- mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
-
- /* Temporary, until we have known_features[] for feature bits in MSRs. */
- mp->arch_caps.raw &=
- (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA |
- ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO |
- ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
- ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO |
- ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO |
- ARCH_CAPS_PBRSB_NO);
-}
-
-static void __init calculate_hvm_max_policy(void)
-{
- struct msr_policy *mp = &hvm_max_cpu_policy;
-
- if ( !hvm_enabled )
- return;
-
- *mp = host_cpu_policy;
-
- /* It's always possible to emulate CPUID faulting for HVM guests */
- mp->platform_info.cpuid_faulting = true;
-
- mp->arch_caps.raw = 0; /* Not supported yet. */
-}
-
-static void __init calculate_pv_max_policy(void)
-{
- struct msr_policy *mp = &pv_max_cpu_policy;
-
- *mp = host_cpu_policy;
-
- mp->arch_caps.raw = 0; /* Not supported yet. */
-}
-
-void __init init_guest_msr_policy(void)
-{
- calculate_raw_policy();
- calculate_host_policy();
- calculate_hvm_max_policy();
- calculate_pv_max_policy();
-}
-
int init_vcpu_msr_policy(struct vcpu *v)
{
struct domain *d = v->domain;
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -50,6 +50,7 @@
#include <asm/nmi.h>
#include <asm/alternative.h>
#include <asm/mc146818rtc.h>
+#include <asm/cpu-policy.h>
#include <asm/cpuid.h>
#include <asm/spec_ctrl.h>
#include <asm/guest.h>
@@ -1729,7 +1730,7 @@ void __init noreturn __start_xen(unsigne
panic("Could not protect TXT memory regions\n");
init_guest_cpuid();
- init_guest_msr_policy();
+ init_guest_cpu_policies();
if ( dom0_pvh )
{
--- a/xen/include/asm-x86/cpu-policy.h
+++ b/xen/include/asm-x86/cpu-policy.h
@@ -10,6 +10,9 @@ extern struct cpu_policy host_cpu_pol
extern struct cpu_policy pv_max_cpu_policy;
extern struct cpu_policy hvm_max_cpu_policy;
+/* Initialise the guest cpu_policy objects. */
+void init_guest_cpu_policies(void);
+
/* Allocate and initialise a CPU policy suitable for the domain. */
int init_domain_cpu_policy(struct domain *d);
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -313,7 +313,6 @@ struct vcpu_msrs
uint32_t dr_mask[4];
};
-void init_guest_msr_policy(void);
int init_vcpu_msr_policy(struct vcpu *v);
/*
