File s390-remove-loadfpzero of Package gcc43
Index: gcc/config/s390/2097.md
===================================================================
*** gcc/config/s390/2097.md.orig
--- gcc/config/s390/2097.md
***************
*** 466,480 ****
(eq_attr "type" "fsimpdf,fmuldf"))
"z10_e1_BOTH, z10_Gate_FP")
- ; LOAD ZERO produces a hex value but we need bin. Using the stage 7
- ; bypass causes an exception for format conversion which is very
- ; expensive. So, make sure subsequent instructions only get the zero
- ; in the normal way.
- (define_insn_reservation "z10_fhex" 12
- (and (eq_attr "cpu" "z10")
- (eq_attr "type" "fhex"))
- "z10_e1_BOTH, z10_Gate_FP")
-
(define_insn_reservation "z10_fsimpsf" 6
(and (eq_attr "cpu" "z10")
(eq_attr "type" "fsimpsf,fmulsf"))
--- 466,471 ----
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 101,111 ****
(UNSPEC_SP_SET 700)
(UNSPEC_SP_TEST 701)
- ; Copy sign instructions
- (UNSPEC_COPYSIGN 800)
-
; Test Data Class (TDC)
! (UNSPEC_TDC_INSN 900)
])
;;
--- 101,108 ----
(UNSPEC_SP_SET 700)
(UNSPEC_SP_TEST 701)
; Test Data Class (TDC)
! (UNSPEC_TDC_INSN 800)
])
;;
***************
*** 1953,1963 ****
"")
(define_insn "*mov<mode>_64"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o, d,QS, d,o")
! (match_operand:TD_TF 1 "general_operand" " G,f,o,f,QS, d,dRT,d"))]
"TARGET_64BIT"
"@
- lzxr\t%0
lxr\t%0,%1
#
#
--- 1950,1959 ----
"")
(define_insn "*mov<mode>_64"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,o, d,QS, d,o")
! (match_operand:TD_TF 1 "general_operand" " f,o,f,QS, d,dRT,d"))]
"TARGET_64BIT"
"@
lxr\t%0,%1
#
#
***************
*** 1965,1984 ****
stmg\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RRE,RRE,*,*,RSY,RSY,*,*")
! (set_attr "type" "fhex,fsimptf,*,*,lm,stm,*,*")])
(define_insn "*mov<mode>_31"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o")
! (match_operand:TD_TF 1 "general_operand" " G,f,o,f"))]
"!TARGET_64BIT"
"@
- lzxr\t%0
lxr\t%0,%1
#
#"
! [(set_attr "op_type" "RRE,RRE,*,*")
! (set_attr "type" "fhex,fsimptf,*,*")])
; TFmode in GPRs splitters
--- 1961,1979 ----
stmg\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RRE,*,*,RSY,RSY,*,*")
! (set_attr "type" "fsimptf,*,*,lm,stm,*,*")])
(define_insn "*mov<mode>_31"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,o")
! (match_operand:TD_TF 1 "general_operand" " f,o,f"))]
"!TARGET_64BIT"
"@
lxr\t%0,%1
#
#"
! [(set_attr "op_type" "RRE,*,*")
! (set_attr "type" "fsimptf,*,*")])
; TFmode in GPRs splitters
***************
*** 2069,2080 ****
(define_insn "*mov<mode>_64dfp"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,f,d,f,f,R,T,d, d,RT")
(match_operand:DD_DF 1 "general_operand"
! " G,f,d,f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT && TARGET_DFP"
"@
- lzdr\t%0
ldr\t%0,%1
ldgr\t%0,%1
lgdr\t%0,%1
--- 2064,2074 ----
(define_insn "*mov<mode>_64dfp"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,d,f,f,R,T,d, d,RT")
(match_operand:DD_DF 1 "general_operand"
! " f,d,f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT && TARGET_DFP"
"@
ldr\t%0,%1
ldgr\t%0,%1
lgdr\t%0,%1
***************
*** 2085,2112 ****
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RRE,RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "fhex,floaddf,floaddf,floaddf,floaddf,floaddf,
fstoredf,fstoredf,lr,load,store")
! (set_attr "z10prop" "*,
! *,
! *,
! *,
! *,
! *,
! *,
! *,
! z10_fr_E1,
! z10_fwd_A3,
! z10_rec")
])
(define_insn "*mov<mode>_64"
! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d, d,RT")
! (match_operand:DD_DF 1 "general_operand" "G,f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT"
"@
- lzdr\t%0
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
--- 2079,2095 ----
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "floaddf,floaddf,floaddf,floaddf,floaddf,
fstoredf,fstoredf,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")
])
(define_insn "*mov<mode>_64"
! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d, d,RT")
! (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT"
"@
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
***************
*** 2115,2141 ****
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,store")
! (set_attr "z10prop" "*,
! *,
! *,
! *,
! *,
! *,
! z10_fr_E1,
! z10_fwd_A3,
! z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,f,f,R,T,d,d,Q,S, d,o")
(match_operand:DD_DF 1 "general_operand"
! " G,f,R,T,f,f,Q,S,d,d,dPRT,d"))]
"!TARGET_64BIT"
"@
- lzdr\t%0
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
--- 2098,2115 ----
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,f,R,T,d,d,Q,S, d,o")
(match_operand:DD_DF 1 "general_operand"
! " f,R,T,f,f,Q,S,d,d,dPRT,d"))]
"!TARGET_64BIT"
"@
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
***************
*** 2147,2154 ****
stmy\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*")
! (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")])
(define_split
--- 2121,2128 ----
stmy\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*")
! (set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")])
(define_split
***************
*** 2198,2209 ****
(define_insn "mov<mode>"
[(set (match_operand:SD_SF 0 "nonimmediate_operand"
! "=f,f,f,f,R,T,d,d,d,R,T")
(match_operand:SD_SF 1 "general_operand"
! " G,f,R,T,f,f,d,R,T,d,d"))]
""
"@
- lzer\t%0
ler\t%0,%1
le\t%0,%1
ley\t%0,%1
--- 2172,2182 ----
(define_insn "mov<mode>"
[(set (match_operand:SD_SF 0 "nonimmediate_operand"
! "=f,f,f,R,T,d,d,d,R,T")
(match_operand:SD_SF 1 "general_operand"
! " f,R,T,f,f,d,R,T,d,d"))]
""
"@
ler\t%0,%1
le\t%0,%1
ley\t%0,%1
***************
*** 2214,2233 ****
ly\t%0,%1
st\t%1,%0
sty\t%1,%0"
! [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
! (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,load,store,store")
! (set_attr "z10prop" "*,
! *,
! *,
! *,
! *,
! *,
! z10_fr_E1,
! z10_fwd_A3,
! z10_fwd_A3,
! z10_rec,
! z10_rec")])
;
; movcc instruction pattern
--- 2187,2196 ----
ly\t%0,%1
st\t%1,%0
sty\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
! (set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,load,store,store")
! (set_attr "z10prop" "*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")])
;
; movcc instruction pattern
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** legitimate_reload_constant_p (rtx op)
*** 2799,2809 ****
&& larl_operand (op, VOIDmode))
return true;
- /* Accept lzXX operands. */
- if (GET_CODE (op) == CONST_DOUBLE
- && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, 'G', "G"))
- return true;
-
/* Accept double-word operands that can be split. */
if (GET_CODE (op) == CONST_INT
&& trunc_int_for_mode (INTVAL (op), word_mode) != INTVAL (op))
--- 2799,2804 ----
