File 0680-erts-Fix-hipe_flush_icache_range-for-FreeBSD-on-ARM.patch of Package erlang
From 9f2ee9b7ecd91b0a2c75d0bcf1a28be02c880797 Mon Sep 17 00:00:00 2001
From: Sverker Eriksson <sverker@erlang.org>
Date: Tue, 28 May 2019 19:08:44 +0200
Subject: [PATCH] erts: Fix hipe_flush_icache_range for FreeBSD on ARM
Avoid old Linux specific syscall assembler if we can.
---
erts/emulator/hipe/hipe_arm.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/erts/emulator/hipe/hipe_arm.c b/erts/emulator/hipe/hipe_arm.c
index f8ef468341..b0779a434b 100644
--- a/erts/emulator/hipe/hipe_arm.c
+++ b/erts/emulator/hipe/hipe_arm.c
@@ -31,24 +31,39 @@
#include "hipe_native_bif.h" /* nbif_callemu() */
#include "hipe_bif0.h"
+#ifndef __has_builtin
+# define __has_builtin(x) 0
+#endif
+
/* Flush dcache and invalidate icache for a range of addresses. */
void hipe_flush_icache_range(void *address, unsigned int nbytes)
{
-#if defined(__ARM_EABI__)
+ void* end = (char*)address + nbytes;
+
+#if ERTS_AT_LEAST_GCC_VSN__(4, 3, 0) || __has_builtin(__builtin___clear_cache)
+ __builtin___clear_cache(address, end);
+#elif defined(__clang__)
+ void __clear_cache(void *start, void *end);
+ __clear_cache(address, end);
+#elif defined(__linux__)
+# if defined(__ARM_EABI__)
register unsigned long beg __asm__("r0") = (unsigned long)address;
- register unsigned long end __asm__("r1") = (unsigned long)address + nbytes;
+ register unsigned long end __asm__("r1") = (unsigned long)end;
register unsigned long flg __asm__("r2") = 0;
register unsigned long scno __asm__("r7") = 0xf0002;
__asm__ __volatile__("swi 0" /* sys_cacheflush() */
: "=r"(beg)
: "0"(beg), "r"(end), "r"(flg), "r"(scno));
-#else
+# else
register unsigned long beg __asm__("r0") = (unsigned long)address;
- register unsigned long end __asm__("r1") = (unsigned long)address + nbytes;
+ register unsigned long end __asm__("r1") = (unsigned long)end;
register unsigned long flg __asm__("r2") = 0;
__asm__ __volatile__("swi 0x9f0002" /* sys_cacheflush() */
: "=r"(beg)
: "0"(beg), "r"(end), "r"(flg));
+# endif
+#else
+# error "Don't know how to flush instruction cache"
#endif
}
--
2.16.4