File 0845-Fix-configure-test-for-arm-memory-barrier-instructio.patch of Package erlang

From 895a976689ba3f1d3f363b984e319ecdd396cca6 Mon Sep 17 00:00:00 2001
From: Rickard Green <rickard@erlang.org>
Date: Fri, 19 Feb 2021 15:00:29 +0100
Subject: [PATCH 1/3] Fix configure test for arm memory barrier instructions

---
 erts/aclocal.m4 | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/erts/aclocal.m4 b/erts/aclocal.m4
index b5816ecc65..779e75cc19 100644
--- a/erts/aclocal.m4
+++ b/erts/aclocal.m4
@@ -1378,7 +1378,7 @@ AC_DEFUN(ETHR_CHK_GCC_ATOMIC_OPS,
     ethr_arm_dbm_st_instr_val=0
     ethr_arm_dbm_ld_instr_val=0
     case "$GCC-$host_cpu" in
-	yes-arm*)
+	yes-arm*|yes-aarch*)
 	    AC_CACHE_CHECK([for ARM 'dmb sy' instruction], ethr_cv_arm_dbm_sy_instr,
 			   [
 				ethr_cv_arm_dbm_sy_instr=no
@@ -1389,7 +1389,7 @@ AC_DEFUN(ETHR_CHK_GCC_ATOMIC_OPS,
 					    [ethr_cv_arm_dbm_sy_instr=yes])
 			   ])
 	    if test $ethr_cv_arm_dbm_sy_instr = yes; then
-		ethr_arm_dbm_instr_val=1
+		ethr_arm_dbm_sy_instr_val=1
 		test $ethr_cv_64bit___atomic_compare_exchange_n = yes &&
 		    ethr_have_gcc_native_atomics=yes
 	    fi
@@ -1402,7 +1402,7 @@ AC_DEFUN(ETHR_CHK_GCC_ATOMIC_OPS,
 					    ],
 					    [ethr_cv_arm_dbm_st_instr=yes])
 			   ])
-	    if test $ethr_cv_arm_dbm_sy_instr = yes; then
+	    if test $ethr_cv_arm_dbm_st_instr = yes; then
 		ethr_arm_dbm_st_instr_val=1
 	    fi
 	    AC_CACHE_CHECK([for ARM 'dmb ld' instruction], ethr_cv_arm_dbm_ld_instr,
@@ -1420,7 +1420,7 @@ AC_DEFUN(ETHR_CHK_GCC_ATOMIC_OPS,
 	*)
 	    ;;
     esac
-    AC_DEFINE_UNQUOTED([ETHR_HAVE_GCC_ASM_ARM_DMB_INSTRUCTION], [$ethr_arm_dbm_instr_val], [Define as a boolean indicating whether you have a gcc compatible compiler capable of generating the ARM 'dmb sy' instruction, and are compiling for an ARM processor with ARM DMB instruction support, or not])
+    AC_DEFINE_UNQUOTED([ETHR_HAVE_GCC_ASM_ARM_DMB_INSTRUCTION], [$ethr_arm_dbm_sy_instr_val], [Define as a boolean indicating whether you have a gcc compatible compiler capable of generating the ARM 'dmb sy' instruction, and are compiling for an ARM processor with ARM DMB instruction support, or not])
     AC_DEFINE_UNQUOTED([ETHR_HAVE_GCC_ASM_ARM_DMB_ST_INSTRUCTION], [$ethr_arm_dbm_st_instr_val], [Define as a boolean indicating whether you have a gcc compatible compiler capable of generating the ARM 'dmb st' instruction, and are compiling for an ARM processor with ARM DMB instruction support, or not])
     AC_DEFINE_UNQUOTED([ETHR_HAVE_GCC_ASM_ARM_DMB_LD_INSTRUCTION], [$ethr_arm_dbm_ld_instr_val], [Define as a boolean indicating whether you have a gcc compatible compiler capable of generating the ARM 'dmb ld' instruction, and are compiling for an ARM processor with ARM DMB instruction support, or not])
     test $ethr_cv_32bit___sync_val_compare_and_swap = yes &&
@@ -2860,6 +2860,9 @@ AC_DEFUN([LM_HARDWARE_ARCH], [
     armv6hl)	ARCH=arm;;
     armv7l)	ARCH=arm;;
     armv7hl)	ARCH=arm;;
+    armv8*)	ARCH=arm;;
+    aarch64)	ARCH=arm64;;
+    aarch*)	ARCH=arm;;
     tile)	ARCH=tile;;
     e2k)        ARCH=e2k;;
     *)	 	ARCH=noarch;;
@@ -2897,8 +2900,8 @@ AC_DEFUN([LM_HARDWARE_ARCH], [
 	ARCH=ppc64
 	;;
     arm-8)
-	AC_MSG_RESULT(yes: adjusting ARCH=arm to ARCH=noarch)
-	ARCH=noarch
+	AC_MSG_RESULT(yes: adjusting ARCH=arm to ARCH=arm64)
+	ARCH=arm64
 	;;
     *)
 	AC_MSG_RESULT(no: ARCH is $ARCH)
-- 
2.26.2

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