File rav1d.changes of Package rav1d

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Sat Aug 16 08:07:26 UTC 2025 - aloisio@gmx.com

- Update to version v1.1.0:
  * Bump version numbers to 1.1.0 (#1389)
  * `#[warn(static_mut_refs)]`: fix with an `#[allow(static_mut_refs)]` since it's in already `unsafe` tool code
  * `#[warn(unpredictable_function_pointer_comparisons)]`: fix with `fn_addr_eq`
  * `rust-toolchain.toml`: update to `nightly-2025-05-01` from `nightly-2024-06-13`
  * arm: looprestoration: Fix the single line loop in sgr_weighted2
  * arm: looprestoration: Add spacing around operators
  * arm: looprestoration: Get rid of unnecessary rotate_ab_N intermediate functions
  * arm: looprestoration: Apply 'const' more consistently on parameters
  * arm: Use /proc/cpuinfo on linux if getauxval is unavailable
  * Port C code changes to Rust
  * AArch64: Add Neon implementation of load_tmvs
  * arm64: looprestoration: Fix a comment typo
  * arm64: looprestoration: Fix use of the wrong register
  * Port C code changes to Rust
  * arm64: looprestoration: Remove an unnecessary duplicate parameter in dav1d_sgr_weighted2_Xbpc_neon
  * arm64: looprestoration: Apply simplifications to align with C code
  * arm: looprestoration: Split an overly long line
  * Rearrange default cdf values to enable fewer copies
  * cdf: Combine memcpy() calls in dav1d_cdf_thread_copy()
  * Add TODO item regarding buffer layout
  * x86: Eliminate hardcoded struct offsets in refmvs load_tmvs() asm
  * Port C code changes to Rust
  * x86: Use the decl and init macros for put_8tap and prep_8tap
  * x86: Improve SSSE3 SGR asm
  * Add building and calling of ARM64 SVE2 assembly functions
  * Fix the macro parameter name for the CHECK_SIZE macro
  * Port C code changes to Rust
  * Ensure that the refmvs_refpair union is packed
  * `build.rs`: update to match changes in `meson.build`
  * Rust: Remove references to deleted 8bpc mc SSE2 asm
  * x86: Make AVX2 SGR gatherless
  * x86: Add 6-tap variants of high bit-depth mc SSSE3 functions
  * x86: Add 6-tap variants of 8bpc mc SSSE3 functions
  * x86: Add minor 8bpc mc SSE improvements
  * x86: Remove 8bpc mc SSE2 asm
  * x86: Remove unused macro in mc16_avx512.asm
  * AArch64: Trim Armv8.0 Neon path of 6-tap and 8-tap MC functions
  * AArch64: New method for calculating sgr table
  * AArch64: Optimize lane load/store in MC functions
  * AArch64: Optimize Armv8.0 Neon path of SBD H/HV 6-tap filters
  * AArch64: Optimize Armv8.0 Neon path of HBD HV 6-tap filters
  * AArch64: Optimize Armv8.0 Neon path of HBD horizontal 6-tap filters
  * AArch64: Optimize Armv8.0 Neon path of HBD horizontal filters
  * aarch64: Split the jump tables to a separate const section
  * aarch64: Enable detection of SVE/SVE2 on Windows
  * aarch64: Fix a label typo
  * aarch64: Avoid looping through the BTI instructions
  * aarch64: ipred: Use the right fill width loop in ipred_z3_fill_padding_neon
  * AArch64: SVE MS armasm64 fix of HBD subpel filters
  * aarch64: mc16: Optimize the BTI landing pads in put/prep_neon
  * AArch64: Add HBD subpel filters using 128-bit SVE2
  * AArch64: Add USMMLA impl. for SBD 6-tap H/HV filters
  * AArch64: Fix typo in SBD 6-tap 2D/HV subpel filter
  * AArch64: Move constants of DotProd subpel filters to .rodata
  * aarch64: Explicitly use the ldur instruction where relevant in mc_dotprod.S
  * Add Arm OpenBSD run-time CPU feature detection support
  * Use an older ubuntu image in CI (#1383)
  * refmvs: Consolidate r and rp_proj allocations
  * `ObuMetaType`: fix enum name for ITU-T T.35 metadata
  * Port C code changes to Rust
  * refmvs: Remove dav1d_refmvs_init()
  * refmvs: Simplify 2-pass logic
  * arm32/msac: Trim C functions, saves 1024 bytes
  * arm64/msac: Trim C functions, saves 1392 bytes
  * Correct ISRG attribution
  * Verify alignment for AlignedVec
  * `build.rs`: Add `#[cfg(debug_assertions)]` to `-F`/`-f` flags because they imply `-g` as well.
  * `tools/build.rs`: Only run when compiling for `*-windows-msvc`, and error if trying to cross compile to `*-windows-msvc`.
  * `tools/build.rs`: Move `rav1d-lib` specific stuff to its own `build.rs` so `rav1d` can cross compile to/from windows.
  * `build.rs`: Make `-Fdwarf`/`-fwin64` flag based on target os, not host os.
  * Fix bug: BT2020_CL vs BT2020_NC
  * `fn DisjointMutArcSlice::from_iter`: Use inline `const {}` block to remove warning about dummy type.
  * `fn mem::transmute`: Replace with sound `Arc::from_raw(Arc::into_raw(...) as *const _)` as `Arc` is not `#[repr(transparent)]`.
  * `fn AlignedVec::resize`: Use `.expect` of `let else panic!`.
  * Rewrite AligvedVec::resize check to checked_mul
  * Address stylistic review comments
  * Validate AlignedVec::resize safety requirements
  * Fix length print when encountering an unknown OBU
  * Make default logger stderr
  * `fn cdef::Fn::call`: Use `.wrapping_as_ptr` for `bottom` to avoid out-of-bounds, as the ptr is temporarily out of bounds when passed to asm.
  * `trait Pixels`: Add `fn wrapping_*as_{mut_,}ptr` methods for non-bounds checked versions.
  * Make dotprod and i8mm configurable features
  * `enum Av1BlockIntraInter`: Remove `#[repr(C)]`, reducing size from 28 to 24, and `Av1Block` from 36 to 32.

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Fri Sep 13 11:59:12 UTC 2024 - Luigi Baldoni <aloisio@gmx.com>

- Initial package (v1.0.0)