File riscv64-zero.patch of Package java-1_7_0-openjdk

--- openjdk/hotspot/src/os/linux/vm/os_linux.cpp	2025-08-31 13:18:58.152573862 +0200
+++ openjdk/hotspot/src/os/linux/vm/os_linux.cpp	2025-08-31 13:20:10.081067387 +0200
@@ -405,7 +405,7 @@
  *        ...
  *        7: The default directories, normally /lib and /usr/lib.
  */
-#if defined(AMD64) || defined(_LP64) && (defined(SPARC) || defined(PPC) || defined(S390) || defined(AARCH64)) || defined(BUILTIN_SIM)
+#if defined(AMD64) || defined(_LP64) && (defined(SPARC) || defined(PPC) || defined(S390) || defined(AARCH64)) || defined(BUILTIN_SIM) || (defined(_LP64) && defined(RISCV))
 #define DEFAULT_LIBPATH "/usr/lib64:/lib64:/lib:/usr/lib"
 #else
 #define DEFAULT_LIBPATH "/lib:/usr/lib"
@@ -2023,6 +2023,10 @@
   #define EM_AARCH64	183
   #endif
 
+  #ifndef EM_RISCV
+  #define EM_RISCV      243               /* RISC-V */
+  #endif
+
   static const arch_t arch_array[]={
     {EM_386,         EM_386,     ELFCLASS32, ELFDATA2LSB, (char*)"IA 32"},
     {EM_486,         EM_386,     ELFCLASS32, ELFDATA2LSB, (char*)"IA 32"},
@@ -2045,7 +2049,8 @@
     {EM_PARISC,      EM_PARISC,  ELFCLASS32, ELFDATA2MSB, (char*)"PARISC"},
     {EM_68K,         EM_68K,     ELFCLASS32, ELFDATA2MSB, (char*)"M68k"},
     {EM_SH,          EM_SH,      ELFCLASS32, ELFDATA2LSB, (char*)"SH"}, /* Support little endian only*/
-    {EM_AARCH64,     EM_AARCH64, ELFCLASS64, ELFDATA2LSB, (char*)"AARCH64"} /* Support little endian only*/
+    {EM_AARCH64,     EM_AARCH64, ELFCLASS64, ELFDATA2LSB, (char*)"AARCH64"}, /* Support little endian only*/
+    {EM_RISCV,       EM_RISCV,   ELFCLASS64, ELFDATA2LSB, (char*)"RISCV"}
   };
 
   #if  (defined IA32)
@@ -2080,9 +2085,11 @@
     static  Elf32_Half running_arch_code=EM_SH;
   #elif  (defined AARCH64)
     static  Elf32_Half running_arch_code=EM_AARCH64;
+  #elif  (defined RISCV)
+    static  Elf32_Half running_arch_code=EM_RISCV;
   #else
     #error Method os::dll_load requires that one of following is defined:\
-      IA32, AMD64, IA64, __sparc, __powerpc__, ARM, S390, ALPHA, MIPS, MIPSEL, PARISC, M68K, SH, AARCH64
+      IA32, AMD64, IA64, __sparc, __powerpc__, ARM, S390, ALPHA, MIPS, MIPSEL, PARISC, M68K, SH, AARCH64, RISCV
   #endif
 
   // Identify compatability class for VM's architecture and library's architecture
@@ -6249,7 +6256,7 @@
 #ifdef BUILTIN_SIM
 #define __NR_fork 57
 #else
-#define __NR_fork IA32_ONLY(2) IA64_ONLY(not defined) AMD64_ONLY(57) AARCH64_ONLY(1079)
+#define __NR_fork IA32_ONLY(2) IA64_ONLY(not defined) AMD64_ONLY(57) AARCH64_ONLY(1079) RISCV_ONLY(2)
 #endif
 #endif
 
@@ -6257,7 +6264,7 @@
 #ifdef BUILTIN_SIM
 #define __NR_execve 59
 #else
-#define __NR_execve IA32_ONLY(11) IA64_ONLY(1033) AMD64_ONLY(59) AARCH64_ONLY(221)
+#define __NR_execve IA32_ONLY(11) IA64_ONLY(1033) AMD64_ONLY(59) AARCH64_ONLY(221) RISCV_ONLY(11)
 #endif
 #endif
 
--- openjdk/hotspot/src/share/vm/utilities/macros.hpp	2025-08-31 13:18:51.678841287 +0200
+++ openjdk/hotspot/src/share/vm/utilities/macros.hpp	2025-08-31 21:44:23.407856959 +0200
@@ -292,6 +292,16 @@
 #define NOT_AARCH64(code) code
 #endif
 
+#if defined(RISCV32) || defined(RISCV64)
+#define RISCV
+#define RISCV_ONLY(code) code
+#define NOT_RISCV(code)
+#else
+#undef RISCV
+#define RISCV_ONLY(code)
+#define NOT_RISCV(code) code
+#endif
+
 #ifdef JAVASE_EMBEDDED
 #define EMBEDDED_ONLY(code) code
 #define NOT_EMBEDDED(code)
--- openjdk/jdk/make/jdk_generic_profile.sh	2025-08-31 13:18:58.153902019 +0200
+++ openjdk/jdk/make/jdk_generic_profile.sh	2025-08-31 16:44:18.610117044 +0200
@@ -287,7 +287,7 @@
     arm|i386|ppc|s390|sh|sparc)
       ARCH_DATA_MODEL=32
       ;;
-    aarch64|alpha|amd64|ia64|ppc64|ppc64le|s390x|sparcv9)
+    aarch64|alpha|amd64|ia64|ppc64|ppc64le|s390x|sparcv9|riscv64)
       ARCH_DATA_MODEL=64
       ;;
     *)
@@ -299,7 +299,7 @@
 
   # ZERO_ENDIANNESS is the endianness of the processor
   case "${ZERO_LIBARCH}" in
-    arm|aarch64|amd64|i386|ia64|mipsel|ppc64le)
+    arm|aarch64|amd64|i386|ia64|mipsel|ppc64le|riscv*)
       ZERO_ENDIANNESS=little
       ;;
     ppc|ppc64|s390*|sparc*|alpha)
@@ -318,6 +318,7 @@
     ppc*)   ZERO_ARCHDEF=PPC   ;;
     s390*)  ZERO_ARCHDEF=S390  ;;
     sparc*) ZERO_ARCHDEF=SPARC ;;
+    riscv*) ZERO_ARCHDEF=RISCV ;;
     *)      ZERO_ARCHDEF=$(echo "${ZERO_LIBARCH}" | tr a-z A-Z)
   esac
   export ZERO_ARCHDEF