File acpi-tables.patch of Package kvm

# Send to upstream BOCHS
This ACPI BIOS patch provides:
- The PCI bus definition for PIC, HPET, RTC, SMC and OSYS and SMIF
- An PBLK which provides the size of the L2 and L3 caches
- If newer hardware like ICH6 IDE is found, init it
Signed-off-by: Alex Graf - http://alex.csgraf.de
Index: bios-mac/acpi-dsdt.dsl
===================================================================
--- bios-mac/acpi-dsdt.dsl.orig
+++ bios-mac/acpi-dsdt.dsl
@@ -199,11 +199,90 @@ DefinitionBlock (
         {
             DBGL,   32,
         }
+        /* PIC mode setting */
+        Name (PICF, 0x00)
+        Method (_PIC, 1, NotSerialized)
+        {
+            Store(Arg0, PICF)
+        }
     }
 
+    OperationRegion (GNVS, SystemMemory, 0x7EEDBC10, 0x0100)
+    Field (GNVS, AnyAcc, Lock, Preserve)
+    {
+        OSYS,   16, 
+        SMIF,   8
+    }
 
     /* PCI Bus definition */
     Scope(\_SB) {
+        OperationRegion (XXX, SystemIO, 0x300, 0x01)
+        Method (_INI, 0, NotSerialized)
+        {
+            Store (0x1, XXX)
+            If (CondRefOf (_OSI, Local0))
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Store (0x2710, OSYS)
+                }
+            }
+            Store (0x35, SMIF)
+        }
+        Device (HPET)
+        {
+            Name (_HID, EisaId ("PNP0103"))
+            Name (_CID, 0x010CD041)
+            Name (BUF0, ResourceTemplate ()
+            {
+                IRQNoFlags ()
+                    {0}
+                IRQNoFlags ()
+                    {8}
+                Memory32Fixed (ReadOnly,
+                    0xFED00000,         // Address Base
+                    0x00000400,         // Address Length
+                    _Y16)
+            })
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (0x0F)
+            }
+            Method (_CRS, 0, Serialized)
+            {
+                Return (BUF0)
+            }
+        }
+        Device (SMC)
+        {
+            Name (_HID, EisaId ("APP0001"))
+            Name (_CID, "smc-napa")
+            Name (_STA, 0x0B)
+            Name (_CRS, ResourceTemplate ()
+            {
+                IO (Decode16,
+                    0x0300,             // Range Minimum
+                    0x0300,             // Range Maximum
+                    0x01,               // Alignment
+                    0x20,               // Length
+                    )
+                IRQNoFlags ()
+                    {6}
+            })
+        }
+        Device (RTC)
+        {
+            Name (_HID, EisaId ("PNP0B00"))
+            Name (_CRS, ResourceTemplate ()
+            {
+                IO (Decode16,
+                    0x0070,             // Range Minimum
+                    0x0070,             // Range Maximum
+                    0x01,               // Alignment
+                    0x08,               // Length
+                    )
+            })
+        }
         Device(PCI0) {
             Name (_HID, EisaId ("PNP0A03"))
             Name (_ADR, 0x00)
@@ -619,6 +698,7 @@ DefinitionBlock (
 		}
 	    }
 
+/* Qemu does not emulate COM2 (Mac OS X finds it in ACPI and fails):
 	    Device (COM2)
 	    {
 	        Name (_HID, EisaId ("PNP0501"))
@@ -646,6 +726,7 @@ DefinitionBlock (
 		    Return (BUF0)
 		}
 	    }
+*/
         }
 
 	/* PIIX4 PM */
Index: bios-mac/rombios32.c
===================================================================
--- bios-mac/rombios32.c.orig
+++ bios-mac/rombios32.c
@@ -659,7 +659,9 @@ static void pci_bios_init_bridges(PCIDev
     vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
     device_id = pci_config_readw(d, PCI_DEVICE_ID);
 
-    if (vendor_id == 0x8086 && device_id == 0x7000) {
+    if (vendor_id == 0x8086 && (device_id == 0x7000 ||
+				 device_id == 0x27a0 ||
+				 device_id == 0x27b9)) {
         int i, irq;
         uint8_t elcr[2];
 
@@ -739,7 +741,8 @@ static void pci_bios_init_device(PCIDevi
             d->bus, d->devfn, vendor_id, device_id);
     switch(class) {
     case 0x0101:
-        if (vendor_id == 0x8086 && device_id == 0x7010) {
+        if (vendor_id == 0x8086 && (device_id == 0x7010 ||
+				     device_id == 0x269e)) {
             /* PIIX3 IDE */
             pci_config_writew(d, 0x40, 0x8000); // enable IDE0
             pci_config_writew(d, 0x42, 0x8000); // enable IDE1
@@ -1449,6 +1452,13 @@ void acpi_bios_init(void)
         acpi_build_table_header((struct acpi_table_header *)madt,
                                 "APIC", madt_size, 1);
     }
+    /* PBLK (CPU information structure) */
+    {
+       uint32_t *pblk = (void*) (0x410);
+       *pblk = 0;
+       ((char*)pblk)[4] = 64; /* size of the Level 2 cache */
+       ((char*)pblk)[5] = 0;  /* size of the Level 3 cache */
+    }
 }
 
 /* SMBIOS entry point -- must be written to a 16-bit aligned address