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home:leviathanch:asic
yosys
yosys_patch1.diff
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File yosys_patch1.diff of Package yosys
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 1879ff4..12a5f07 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -138,7 +138,7 @@ static void free_attr(std::map<std::string, AstNode*> *al) %left OP_POW %right UNARY_OPS -%define parse.error verbose +// %define parse.error verbose %define parse.lac full %expect 2
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