File 0018-Revert-riscv-dts-jh7110-Update-qspi.patch of Package u-boot
From 53ff6a6fdf3027fff801d50a9962c716bbdeed22 Mon Sep 17 00:00:00 2001
From: Matthias Brugger <mbrugger@suse.com>
Date: Wed, 16 Oct 2024 14:31:53 +0200
Subject: [PATCH] Revert "riscv: dts: jh7110: Update qspi node with upstream"
(bsc#1231674)
This reverts commit a28b57b475d5c20e00d80b1ee0d085f1bf635afb.
---
.../jh7110-starfive-visionfive-2-u-boot.dtsi | 2 +-
.../dts/jh7110-starfive-visionfive-2.dtsi | 29 +++----------------
arch/riscv/dts/jh7110.dtsi | 19 +++++-------
3 files changed, 13 insertions(+), 37 deletions(-)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
index a69d8fcb391..3012466b305 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
@@ -40,7 +40,7 @@
&qspi {
bootph-pre-ram;
- nor_flash@0 {
+ nor-flash@0 {
bootph-pre-ram;
};
};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index 375449b73a8..e11babc1cde 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -305,38 +305,17 @@
};
&qspi {
- #address-cells = <1>;
- #size-cells = <0>;
+ spi-max-frequency = <250000000>;
status = "okay";
- nor_flash: nor_flash@0 {
+ nor-flash@0 {
compatible = "jedec,spi-nor";
- reg = <0>;
- cdns,read-delay = <5>;
- spi-max-frequency = <12000000>;
+ reg=<0>;
+ spi-max-frequency = <100000000>;
cdns,tshsl-ns = <1>;
cdns,tsd2d-ns = <1>;
cdns,tchsh-ns = <1>;
cdns,tslch-ns = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- spl@0 {
- reg = <0x0 0x80000>;
- };
- uboot-env@f0000 {
- reg = <0xf0000 0x10000>;
- };
- uboot@100000 {
- reg = <0x100000 0x400000>;
- };
- reserved-data@600000 {
- reg = <0x600000 0xa00000>;
- };
- };
};
};
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index 2b331e58497..2cdc683d49b 100644
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -480,22 +480,19 @@
};
qspi: spi@13010000 {
- compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";
- reg = <0x0 0x13010000 0x0 0x10000>,
- <0x0 0x21000000 0x0 0x400000>;
- interrupts = <25>;
- clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,
- <&syscrg JH7110_SYSCLK_QSPI_AHB>,
- <&syscrg JH7110_SYSCLK_QSPI_APB>;
- clock-names = "ref", "ahb", "apb";
+ compatible = "cdns,qspi-nor";
+ reg = <0x0 0x13010000 0x0 0x10000
+ 0x0 0x21000000 0x0 0x400000>;
+ clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>;
+ clock-names = "clk_ref";
resets = <&syscrg JH7110_SYSRST_QSPI_APB>,
<&syscrg JH7110_SYSRST_QSPI_AHB>,
<&syscrg JH7110_SYSRST_QSPI_REF>;
- reset-names = "qspi", "qspi-ocp", "rstc_ref";
+ reset-names = "rst_apb", "rst_ahb", "rst_ref";
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
- cdns,trigger-address = <0x0>;
- status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
syscrg: clock-controller@13020000 {
