File 0017-sipeed-slogic-analyzer-switch-from-SR_CONF_BUFFERSIZ.patch of Package libsigrok
From 101fbe64a3eec13d39f27f40fb46ce386df9f64d Mon Sep 17 00:00:00 2001
From: Mikhail Paulyshka <me@mixaill.net>
Date: Sun, 14 Dec 2025 19:04:35 +0300
Subject: [PATCH 17/17] sipeed-slogic-analyzer: switch from SR_CONF_BUFFERSIZE
to SR_CONF_NUM_LOGIC_CHANNELS
---
src/hardware/sipeed-slogic-analyzer/api.c | 26 +++++++++----------
.../sipeed-slogic-analyzer/protocol.h | 6 ++---
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/src/hardware/sipeed-slogic-analyzer/api.c b/src/hardware/sipeed-slogic-analyzer/api.c
index 798a0025d..d736e380f 100644
--- a/src/hardware/sipeed-slogic-analyzer/api.c
+++ b/src/hardware/sipeed-slogic-analyzer/api.c
@@ -34,12 +34,12 @@ static const uint32_t drvopts[] = {
static const uint32_t devopts[] = {
SR_CONF_CONTINUOUS,
- SR_CONF_BUFFERSIZE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_NUM_LOGIC_CHANNELS | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST
};
static const uint64_t samplerates_slogiccombo8[] = {
@@ -65,7 +65,7 @@ static const uint64_t samplerates_slogiccombo8[] = {
SR_MHZ(160),
};
-static const uint64_t samplechannels_slogiccombo8[] = { 2, 4, 8 };
+static const int32_t samplechannels_slogiccombo8[] = { 2, 4, 8 };
static const uint64_t limit_samplerates_slogiccombo8[] = { SR_MHZ(160), SR_MHZ(80), SR_MHZ(40) };
static const uint64_t samplerates_slogic16u3[] = {
@@ -114,7 +114,7 @@ static const uint64_t samplerates_slogic16u3[] = {
// SR_MHZ(1500),
};
-static const uint64_t samplechannels_slogic16u3[] = { /*2, */4, 8, 16 };
+static const int32_t samplechannels_slogic16u3[] = { /*2, */4, 8, 16 };
static const uint64_t limit_samplerates_slogic16u3[] =
#ifdef _WIN32
{ /*SR_MHZ(1500), */SR_MHZ(400), SR_MHZ(200), SR_MHZ(100) };
@@ -246,7 +246,7 @@ static GSList *scan(struct sr_dev_driver *di, GSList *options)
devc->limit_samplechannel = devc->model->samplechannel_table[
devc->model->samplechannel_table_size - 1];
devc->limit_samplerate = devc->model->limit_samplerate_table[
- std_u64_idx(g_variant_new_uint64(devc->limit_samplechannel),
+ std_i32_idx(g_variant_new_int32(devc->limit_samplechannel),
devc->model->samplechannel_table, devc->model->samplechannel_table_size)
];
@@ -396,8 +396,8 @@ static int config_get(uint32_t key, GVariant **data,
case SR_CONF_SAMPLERATE:
*data = g_variant_new_uint64(devc->cur_samplerate);
break;
- case SR_CONF_BUFFERSIZE:
- *data = g_variant_new_uint64(devc->cur_samplechannel);
+ case SR_CONF_NUM_LOGIC_CHANNELS:
+ *data = g_variant_new_int32(devc->cur_samplechannel);
break;
case SR_CONF_PATTERN_MODE:
*data = g_variant_new_string(
@@ -444,16 +444,16 @@ static int config_set(uint32_t key, GVariant *data,
}
break;
- case SR_CONF_BUFFERSIZE:
- if (std_u64_idx(data, devc->model->samplechannel_table, devc->model->samplechannel_table_size) < 0) {
+ case SR_CONF_NUM_LOGIC_CHANNELS:
+ if (std_i32_idx(data, devc->model->samplechannel_table, devc->model->samplechannel_table_size) < 0) {
devc->cur_samplechannel = devc->limit_samplechannel;
sr_warn("Reach limit or not supported, wrap to %uch.",
devc->limit_samplechannel);
} else {
- devc->cur_samplechannel = g_variant_get_uint64(data);
+ devc->cur_samplechannel = g_variant_get_int32(data);
devc->limit_samplerate = devc->model->limit_samplerate_table[
- std_u64_idx(g_variant_new_uint64(devc->cur_samplechannel),
+ std_i32_idx(g_variant_new_int32(devc->cur_samplechannel),
devc->model->samplechannel_table, devc->model->samplechannel_table_size)
];
@@ -523,7 +523,7 @@ int config_channel_set(const struct sr_dev_inst *sdi, struct sr_channel *ch, uns
return SR_OK;
}
- uint64_t new_samplechannel = devc->model->samplechannel_table[0];
+ int32_t new_samplechannel = devc->model->samplechannel_table[0];
for (GSList *l = devc->digital_group->channels; l;l = l->next) {
struct sr_channel *ch = l->data;
if(!ch->enabled || ch->index < new_samplechannel){
@@ -576,8 +576,8 @@ static int config_list(uint32_t key, GVariant **data,
if (NULL == devc->model)
ret = SR_ERR_ARG;
break;
- case SR_CONF_BUFFERSIZE:
- *data = std_gvar_array_u64(devc->model->samplechannel_table, devc->model->samplechannel_table_size);
+ case SR_CONF_NUM_LOGIC_CHANNELS:
+ *data = std_gvar_array_i32(devc->model->samplechannel_table, devc->model->samplechannel_table_size);
break;
case SR_CONF_PATTERN_MODE:
*data = g_variant_new_strv(ARRAY_AND_SIZE(patterns));
diff --git a/src/hardware/sipeed-slogic-analyzer/protocol.h b/src/hardware/sipeed-slogic-analyzer/protocol.h
index 9e8f387d4..b39a75926 100644
--- a/src/hardware/sipeed-slogic-analyzer/protocol.h
+++ b/src/hardware/sipeed-slogic-analyzer/protocol.h
@@ -46,7 +46,7 @@ struct slogic_model {
const uint16_t pid;
const uint8_t ep_in;
const uint64_t max_bandwidth; // limit by hardware
- const uint64_t *samplechannel_table;
+ const int32_t *samplechannel_table;
const uint64_t samplechannel_table_size;
const uint64_t *limit_samplerate_table;
const uint64_t *samplerate_table;
@@ -67,13 +67,13 @@ struct dev_context {
struct {
uint64_t limit_samplerate;
- uint64_t limit_samplechannel;
+ int32_t limit_samplechannel;
};
struct {
uint64_t cur_limit_samples;
uint64_t cur_samplerate;
- uint64_t cur_samplechannel;
+ int32_t cur_samplechannel;
int64_t cur_pattern_mode_idx;
}; // configuration
--
2.52.0
