File ipxe.63037bdce4a325e5e1da85ffcdf27b77ac670c01.p... of Package xen

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File ipxe.63037bdce4a325e5e1da85ffcdf27b77ac670c01.patch of Package xen (Revision 9c19b2ac2b72c8989bd52e3b7b9c28ae)

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From: Michael Brown <mcb30@ipxe.org>
Date: Wed, 4 May 2016 15:57:44 +0100
Subject: 63037bdce4a325e5e1da85ffcdf27b77ac670c01

[ath] Fix building with GCC 6

Signed-off-by: Michael Brown <mcb30@ipxe.org>
---
 src/drivers/net/ath/ath.h                       |  2 --
 src/drivers/net/ath/ath5k/ath5k.c               | 40 ----------------------------------------
 src/drivers/net/ath/ath5k/ath5k_phy.c           |  6 +++---
 src/drivers/net/ath/ath5k/ath5k_reset.c         |  8 --------
 src/drivers/net/ath/ath9k/ar9002_initvals.h     | 72 ++++++++++++++++++++++++++++++++++++------------------------------------
 src/drivers/net/ath/ath9k/ar9003_2p2_initvals.h | 40 ++++++++++++++++++++--------------------
 src/drivers/net/ath/ath9k/ar9340_initvals.h     | 36 ++++++++++++++++++------------------
 src/drivers/net/ath/ath9k/ar9485_initvals.h     | 44 ++++++++++++++++++++++----------------------
 src/drivers/net/ath/ath9k/ath9k_init.c          |  3 ++-
 9 files changed, 101 insertions(+), 150 deletions(-)

--- a/src/drivers/net/ath/ath.h
+++ b/src/drivers/net/ath/ath.h
@@ -90,26 +90,24 @@ static inline u32 get_unaligned_le32(const void *p)
 /* End Kernel Block */
 
 /*
  * The key cache is used for h/w cipher state and also for
  * tracking station state such as the current tx antenna.
  * We also setup a mapping table between key cache slot indices
  * and station state to short-circuit node lookups on rx.
  * Different parts have different size key caches.  We handle
  * up to ATH_KEYMAX entries (could dynamically allocate state).
  */
 #define	ATH_KEYMAX	        128     /* max key cache size we handle */
 
-static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-
 struct ath_ani {
 	int caldone;
 	unsigned int longcal_timer;
 	unsigned int shortcal_timer;
 	unsigned int resetcal_timer;
 	unsigned int checkani_timer;
 	int timer;
 };
 
 struct ath_cycle_counters {
 	u32 cycles;
 	u32 rx_busy;
--- a/src/drivers/net/ath/ath5k/ath5k.c
+++ b/src/drivers/net/ath/ath5k/ath5k.c
@@ -76,64 +76,24 @@ static struct pci_device_id ath5k_nics[] = {
 	PCI_ROM(0x168c, 0x0014, "ath5212x14", "Atheros 5212 x14", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x0015, "ath5212x15", "Atheros 5212 x15", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x0016, "ath5212x16", "Atheros 5212 x16", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x0017, "ath5212x17", "Atheros 5212 x17", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x0018, "ath5212x18", "Atheros 5212 x18", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x0019, "ath5212x19", "Atheros 5212 x19", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x001a, "ath2413", "Atheros 2413 Griffin", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x001b, "ath5413", "Atheros 5413 Eagle", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x001c, "ath5212e", "Atheros 5212 PCI-E", AR5K_AR5212),
 	PCI_ROM(0x168c, 0x001d, "ath2417", "Atheros 2417 Nala", AR5K_AR5212),
 };
 
-/* Known SREVs */
-static const struct ath5k_srev_name srev_names[] = {
-	{ "5210",	AR5K_VERSION_MAC,	AR5K_SREV_AR5210 },
-	{ "5311",	AR5K_VERSION_MAC,	AR5K_SREV_AR5311 },
-	{ "5311A",	AR5K_VERSION_MAC,	AR5K_SREV_AR5311A },
-	{ "5311B",	AR5K_VERSION_MAC,	AR5K_SREV_AR5311B },
-	{ "5211",	AR5K_VERSION_MAC,	AR5K_SREV_AR5211 },
-	{ "5212",	AR5K_VERSION_MAC,	AR5K_SREV_AR5212 },
-	{ "5213",	AR5K_VERSION_MAC,	AR5K_SREV_AR5213 },
-	{ "5213A",	AR5K_VERSION_MAC,	AR5K_SREV_AR5213A },
-	{ "2413",	AR5K_VERSION_MAC,	AR5K_SREV_AR2413 },
-	{ "2414",	AR5K_VERSION_MAC,	AR5K_SREV_AR2414 },
-	{ "5424",	AR5K_VERSION_MAC,	AR5K_SREV_AR5424 },
-	{ "5413",	AR5K_VERSION_MAC,	AR5K_SREV_AR5413 },
-	{ "5414",	AR5K_VERSION_MAC,	AR5K_SREV_AR5414 },
-	{ "2415",	AR5K_VERSION_MAC,	AR5K_SREV_AR2415 },
-	{ "5416",	AR5K_VERSION_MAC,	AR5K_SREV_AR5416 },
-	{ "5418",	AR5K_VERSION_MAC,	AR5K_SREV_AR5418 },
-	{ "2425",	AR5K_VERSION_MAC,	AR5K_SREV_AR2425 },
-	{ "2417",	AR5K_VERSION_MAC,	AR5K_SREV_AR2417 },
-	{ "xxxxx",	AR5K_VERSION_MAC,	AR5K_SREV_UNKNOWN },
-	{ "5110",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5110 },
-	{ "5111",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5111 },
-	{ "5111A",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5111A },
-	{ "2111",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_2111 },
-	{ "5112",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5112 },
-	{ "5112A",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5112A },
-	{ "5112B",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5112B },
-	{ "2112",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_2112 },
-	{ "2112A",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_2112A },
-	{ "2112B",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_2112B },
-	{ "2413",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_2413 },
-	{ "5413",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5413 },
-	{ "2316",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_2316 },
-	{ "2317",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_2317 },
-	{ "5424",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5424 },
-	{ "5133",	AR5K_VERSION_RAD,	AR5K_SREV_RAD_5133 },
-	{ "xxxxx",	AR5K_VERSION_RAD,	AR5K_SREV_UNKNOWN },
-};
-
 #define ATH5K_SPMBL_NO   1
 #define ATH5K_SPMBL_YES  2
 #define ATH5K_SPMBL_BOTH 3
 
 static const struct {
 	u16 bitrate;
 	u8 short_pmbl;
 	u8 hw_code;
 } ath5k_rates[] = {
 	{ 10, ATH5K_SPMBL_BOTH, ATH5K_RATE_CODE_1M },
 	{ 20, ATH5K_SPMBL_NO, ATH5K_RATE_CODE_2M },
 	{ 55, ATH5K_SPMBL_NO, ATH5K_RATE_CODE_5_5M },
--- a/src/drivers/net/ath/ath5k/ath5k_phy.c
+++ b/src/drivers/net/ath/ath5k/ath5k_phy.c
@@ -1210,30 +1210,30 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah,
 
 	/*
 	 * Calibrate the radio chip
 	 */
 
 	/* Remember normal state */
 	phy_sig = ath5k_hw_reg_read(ah, AR5K_PHY_SIG);
 	phy_agc = ath5k_hw_reg_read(ah, AR5K_PHY_AGCCOARSE);
 	phy_sat = ath5k_hw_reg_read(ah, AR5K_PHY_ADCSAT);
 
 	/* Update radio registers */
 	ath5k_hw_reg_write(ah, (phy_sig & ~(AR5K_PHY_SIG_FIRPWR)) |
-		AR5K_REG_SM(-1, AR5K_PHY_SIG_FIRPWR), AR5K_PHY_SIG);
+		AR5K_REG_SM(-1U, AR5K_PHY_SIG_FIRPWR), AR5K_PHY_SIG);
 
 	ath5k_hw_reg_write(ah, (phy_agc & ~(AR5K_PHY_AGCCOARSE_HI |
 			AR5K_PHY_AGCCOARSE_LO)) |
-		AR5K_REG_SM(-1, AR5K_PHY_AGCCOARSE_HI) |
-		AR5K_REG_SM(-127, AR5K_PHY_AGCCOARSE_LO), AR5K_PHY_AGCCOARSE);
+		AR5K_REG_SM(-1U, AR5K_PHY_AGCCOARSE_HI) |
+		AR5K_REG_SM(-127U, AR5K_PHY_AGCCOARSE_LO), AR5K_PHY_AGCCOARSE);
 
 	ath5k_hw_reg_write(ah, (phy_sat & ~(AR5K_PHY_ADCSAT_ICNT |
 			AR5K_PHY_ADCSAT_THR)) |
 		AR5K_REG_SM(2, AR5K_PHY_ADCSAT_ICNT) |
 		AR5K_REG_SM(12, AR5K_PHY_ADCSAT_THR), AR5K_PHY_ADCSAT);
 
 	udelay(20);
 
 	AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGC, AR5K_PHY_AGC_DISABLE);
 	udelay(10);
 	ath5k_hw_reg_write(ah, AR5K_PHY_RFSTG_DISABLE, AR5K_PHY_RFSTG);
 	AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_AGC, AR5K_PHY_AGC_DISABLE);
--- a/src/drivers/net/ath/ath5k/ath5k_reset.c
+++ b/src/drivers/net/ath/ath5k/ath5k_reset.c
@@ -125,32 +125,24 @@ static int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
 	 * and mantissa (remove scaling) and set them on hw */
 	ds_coef_man = coef_man >> (24 - coef_exp);
 	ds_coef_exp = coef_exp - 16;
 
 	AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_3,
 		AR5K_PHY_TIMING_3_DSC_MAN, ds_coef_man);
 	AR5K_REG_WRITE_BITS(ah, AR5K_PHY_TIMING_3,
 		AR5K_PHY_TIMING_3_DSC_EXP, ds_coef_exp);
 
 	return 0;
 }
 
-
-/*
- * index into rates for control rates, we can set it up like this because
- * this is only used for AR5212 and we know it supports G mode
- */
-static const unsigned int control_rates[] =
-	{ 0, 1, 1, 1, 4, 4, 6, 6, 8, 8, 8, 8 };
-
 /**
  * ath5k_hw_write_rate_duration - fill rate code to duration table
  *
  * @ah: the &struct ath5k_hw
  * @mode: one of enum ath5k_driver_mode
  *
  * Write the rate code to duration table upon hw reset. This is a helper for
  * ath5k_hw_reset(). It seems all this is doing is setting an ACK timeout on
  * the hardware, based on current mode, for each rate. The rates which are
  * capable of short preamble (802.11b rates 2Mbps, 5.5Mbps, and 11Mbps) have
  * different rate code so we write their value twice (one for long preample
  * and one for short).
--- a/src/drivers/net/ath/ath9k/ar9002_initvals.h
+++ b/src/drivers/net/ath/ath9k/ar9002_initvals.h
@@ -5,25 +5,25 @@
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
  *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-static const u32 ar9280Modes_9280_2[][6] = {
+static __unused const u32 ar9280Modes_9280_2[][6] = {
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
 	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180},
 	{0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008},
 	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0},
 	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f},
 	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810},
 	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a, 0x0000320a},
 	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880},
 	{0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303},
 	{0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
 	{0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
@@ -54,25 +54,25 @@ static const u32 ar9280Modes_9280_2[][6] = {
 	{0x0000a20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019},
 	{0x0000b20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019},
 	{0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
 	{0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000},
 	{0x0000a23c, 0x13c88000, 0x13c88000, 0x13c88001, 0x13c88000, 0x13c88000},
 	{0x0000a250, 0x001ff000, 0x001ff000, 0x0004a000, 0x0004a000, 0x0004a000},
 	{0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e},
 	{0x0000a388, 0x0c000000, 0x0c000000, 0x08000000, 0x0c000000, 0x0c000000},
 	{0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000},
 };
 
-static const u32 ar9280Common_9280_2[][2] = {
+static __unused const u32 ar9280Common_9280_2[][2] = {
 	/* Addr      allmodes  */
 	{0x0000000c, 0x00000000},
 	{0x00000030, 0x00020015},
 	{0x00000034, 0x00000005},
 	{0x00000040, 0x00000000},
 	{0x00000044, 0x00000008},
 	{0x00000048, 0x00000008},
 	{0x0000004c, 0x00000010},
 	{0x00000050, 0x00000000},
 	{0x00000054, 0x0000001f},
 	{0x00000800, 0x00000000},
 	{0x00000804, 0x00000000},
@@ -398,42 +398,42 @@ static const u32 ar9280Common_9280_2[][2] = {
 	{0x00007870, 0x807ec400},
 	{0x00007874, 0x001b6db0},
 	{0x00007878, 0x00376b63},
 	{0x0000787c, 0x06db6db6},
 	{0x00007880, 0x006d8000},
 	{0x00007884, 0xffeffffe},
 	{0x00007888, 0xffeffffe},
 	{0x0000788c, 0x00010000},
 	{0x00007890, 0x02060aeb},
 	{0x00007898, 0x2a850160},
 };
 
-static const u32 ar9280Modes_fast_clock_9280_2[][3] = {
+static __unused const u32 ar9280Modes_fast_clock_9280_2[][3] = {
 	/* Addr      5G_HT20     5G_HT40   */
 	{0x00001030, 0x00000268, 0x000004d0},
 	{0x00001070, 0x0000018c, 0x00000318},
 	{0x000010b0, 0x00000fd0, 0x00001fa0},
 	{0x00008014, 0x044c044c, 0x08980898},
 	{0x0000801c, 0x148ec02b, 0x148ec057},
 	{0x00008318, 0x000044c0, 0x00008980},
 	{0x00009820, 0x02020200, 0x02020200},
 	{0x00009824, 0x01000f0f, 0x01000f0f},
 	{0x00009828, 0x0b020001, 0x0b020001},
 	{0x00009834, 0x00000f0f, 0x00000f0f},
 	{0x00009844, 0x03721821, 0x03721821},
 	{0x00009914, 0x00000898, 0x00001130},
 	{0x00009918, 0x0000000b, 0x00000016},
 };
 
-static const u32 ar9280Modes_backoff_23db_rxgain_9280_2[][6] = {
+static __unused const u32 ar9280Modes_backoff_23db_rxgain_9280_2[][6] = {
 	{0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290, 0x00000290},
 	{0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300, 0x00000300},
 	{0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304, 0x00000304},
 	{0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308, 0x00000308},
 	{0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c, 0x0000030c},
 	{0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004, 0x00008004},
 	{0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008, 0x00008008},
 	{0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c, 0x0000800c},
 	{0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080, 0x00008080},
 	{0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084, 0x00008084},
 	{0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088, 0x00008088},
@@ -548,25 +548,25 @@ static const u32 ar9280Modes_backoff_23db_rxgain_9280_2[][6] = {
 	{0x00009be0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009be4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009be8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009bec, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009bf0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009bf4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009bf8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009bfc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb},
 	{0x00009848, 0x00001066, 0x00001066, 0x00001055, 0x00001055, 0x00001055},
 	{0x0000a848, 0x00001066, 0x00001066, 0x00001055, 0x00001055, 0x00001055},
 };
 
-static const u32 ar9280Modes_original_rxgain_9280_2[][6] = {
+static __unused const u32 ar9280Modes_original_rxgain_9280_2[][6] = {
 	{0x00009a00, 0x00008184, 0x00008184, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a04, 0x00008188, 0x00008188, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a08, 0x0000818c, 0x0000818c, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a0c, 0x00008190, 0x00008190, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a10, 0x00008194, 0x00008194, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004, 0x00008004},
 	{0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008, 0x00008008},
 	{0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c, 0x0000800c},
 	{0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080, 0x00008080},
 	{0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084, 0x00008084},
 	{0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088, 0x00008088},
@@ -681,25 +681,25 @@ static const u32 ar9280Modes_original_rxgain_9280_2[][6] = {
 	{0x00009be0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009be4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009be8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009bec, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009bf0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009bf4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009bf8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009bfc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db},
 	{0x00009848, 0x00001066, 0x00001066, 0x00001063, 0x00001063, 0x00001063},
 	{0x0000a848, 0x00001066, 0x00001066, 0x00001063, 0x00001063, 0x00001063},
 };
 
-static const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][6] = {
+static __unused const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][6] = {
 	{0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290, 0x00000290},
 	{0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300, 0x00000300},
 	{0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304, 0x00000304},
 	{0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308, 0x00000308},
 	{0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c, 0x0000030c},
 	{0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000, 0x00008000},
 	{0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004, 0x00008004},
 	{0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008, 0x00008008},
 	{0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c, 0x0000800c},
 	{0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080, 0x00008080},
 	{0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084, 0x00008084},
 	{0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088, 0x00008088},
@@ -814,25 +814,25 @@ static const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][6] = {
 	{0x00009be0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009be4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009be8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009bec, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009bf0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009bf4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009bf8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009bfc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b},
 	{0x00009848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a, 0x0000105a},
 	{0x0000a848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a, 0x0000105a},
 };
 
-static const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = {
+static __unused const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = {
 	{0x0000a274, 0x0a19e652, 0x0a19e652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652},
 	{0x0000a27c, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce},
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00003002, 0x00003002, 0x00004002, 0x00004002, 0x00004002},
 	{0x0000a308, 0x00006004, 0x00006004, 0x00007008, 0x00007008, 0x00007008},
 	{0x0000a30c, 0x0000a006, 0x0000a006, 0x0000c010, 0x0000c010, 0x0000c010},
 	{0x0000a310, 0x0000e012, 0x0000e012, 0x00010012, 0x00010012, 0x00010012},
 	{0x0000a314, 0x00011014, 0x00011014, 0x00013014, 0x00013014, 0x00013014},
 	{0x0000a318, 0x0001504a, 0x0001504a, 0x0001820a, 0x0001820a, 0x0001820a},
 	{0x0000a31c, 0x0001904c, 0x0001904c, 0x0001b211, 0x0001b211, 0x0001b211},
 	{0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213, 0x0001e213},
 	{0x0000a324, 0x00021092, 0x00021092, 0x00022411, 0x00022411, 0x00022411},
@@ -848,25 +848,25 @@ static const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = {
 	{0x0000a34c, 0x000341ec, 0x000341ec, 0x0004bed5, 0x0004bed5, 0x0004bed5},
 	{0x0000a350, 0x000341ec, 0x000341ec, 0x0004ff54, 0x0004ff54, 0x0004ff54},
 	{0x0000a354, 0x000341ec, 0x000341ec, 0x00055fd5, 0x00055fd5, 0x00055fd5},
 	{0x0000a3ec, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081},
 	{0x00007814, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff},
 	{0x00007838, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff},
 	{0x0000781c, 0x00172000, 0x00172000, 0x00172000, 0x00172000, 0x00172000},
 	{0x00007840, 0x00172000, 0x00172000, 0x00172000, 0x00172000, 0x00172000},
 	{0x00007820, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480},
 	{0x00007844, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480},
 };
 
-static const u32 ar9280Modes_original_tx_gain_9280_2[][6] = {
+static __unused const u32 ar9280Modes_original_tx_gain_9280_2[][6] = {
 	{0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652},
 	{0x0000a27c, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce},
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002, 0x00003002},
 	{0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009, 0x00008009},
 	{0x0000a30c, 0x0000a006, 0x0000a006, 0x0000b00b, 0x0000b00b, 0x0000b00b},
 	{0x0000a310, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012},
 	{0x0000a314, 0x00011014, 0x00011014, 0x00012048, 0x00012048, 0x00012048},
 	{0x0000a318, 0x0001504a, 0x0001504a, 0x0001604a, 0x0001604a, 0x0001604a},
 	{0x0000a31c, 0x0001904c, 0x0001904c, 0x0001a211, 0x0001a211, 0x0001a211},
 	{0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213, 0x0001e213},
 	{0x0000a324, 0x00020092, 0x00020092, 0x0002121b, 0x0002121b, 0x0002121b},
@@ -882,81 +882,81 @@ static const u32 ar9280Modes_original_tx_gain_9280_2[][6] = {
 	{0x0000a34c, 0x000321ec, 0x000321ec, 0x00046e8a, 0x00046e8a, 0x00046e8a},
 	{0x0000a350, 0x000321ec, 0x000321ec, 0x00049ec9, 0x00049ec9, 0x00049ec9},
 	{0x0000a354, 0x000321ec, 0x000321ec, 0x0004bf42, 0x0004bf42, 0x0004bf42},
 	{0x0000a3ec, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081},
 	{0x00007814, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff},
 	{0x00007838, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff},
 	{0x0000781c, 0x00392000, 0x00392000, 0x00392000, 0x00392000, 0x00392000},
 	{0x00007840, 0x00392000, 0x00392000, 0x00392000, 0x00392000, 0x00392000},
 	{0x00007820, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480},
 	{0x00007844, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480},
 };
 
-static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = {
+static __unused const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffc},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = {
+static __unused const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffd},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9285PciePhy_clkreq_always_on_L1_9285[][2] = {
+static __unused const u32 ar9285PciePhy_clkreq_always_on_L1_9285[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffd},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9285PciePhy_clkreq_off_L1_9285[][2] = {
+static __unused const u32 ar9285PciePhy_clkreq_off_L1_9285[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffc},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9285Modes_9285_1_2[][6] = {
+static __unused const u32 ar9285Modes_9285_1_2[][6] = {
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
 	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180},
 	{0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008},
 	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0},
 	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f},
 	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880},
 	{0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303},
 	{0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
 	{0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
 	{0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
 	{0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
@@ -1243,25 +1243,25 @@ static const u32 ar9285Modes_9285_1_2[][6] = {
 	{0x0000abf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000},
 	{0x0000abf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000},
 	{0x0000abfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000},
 	{0x0000a204, 0x00000004, 0x00000004, 0x00000004, 0x00000004, 0x00000004},
 	{0x0000a20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000},
 	{0x0000b20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000},
 	{0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
 	{0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000},
 	{0x0000a250, 0x0004f000, 0x0004f000, 0x0004a000, 0x0004a000, 0x0004a000},
 	{0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e},
 };
 
-static const u32 ar9285Common_9285_1_2[][2] = {
+static __unused const u32 ar9285Common_9285_1_2[][2] = {
 	/* Addr      allmodes  */
 	{0x0000000c, 0x00000000},
 	{0x00000030, 0x00020045},
 	{0x00000034, 0x00000005},
 	{0x00000040, 0x00000000},
 	{0x00000044, 0x00000008},
 	{0x00000048, 0x00000008},
 	{0x0000004c, 0x00000010},
 	{0x00000050, 0x00000000},
 	{0x00000054, 0x0000001f},
 	{0x00000800, 0x00000000},
 	{0x00000804, 0x00000000},
@@ -1563,25 +1563,25 @@ static const u32 ar9285Common_9285_1_2[][2] = {
 	{0x00007848, 0x6db6246f},
 	{0x0000784c, 0x6d9b66db},
 	{0x00007850, 0x6d8c6dba},
 	{0x00007854, 0x00040000},
 	{0x00007858, 0xdb003012},
 	{0x0000785c, 0x04924914},
 	{0x00007860, 0x21084210},
 	{0x00007864, 0xf7d7ffde},
 	{0x00007868, 0xc2034080},
 	{0x00007870, 0x10142c00},
 };
 
-static const u32 ar9285Modes_high_power_tx_gain_9285_1_2[][6] = {
+static __unused const u32 ar9285Modes_high_power_tx_gain_9285_1_2[][6] = {
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00000000, 0x00000000, 0x00006200, 0x00006200, 0x00000000},
 	{0x0000a308, 0x00000000, 0x00000000, 0x00008201, 0x00008201, 0x00000000},
 	{0x0000a30c, 0x00000000, 0x00000000, 0x0000b240, 0x0000b240, 0x00000000},
 	{0x0000a310, 0x00000000, 0x00000000, 0x0000d241, 0x0000d241, 0x00000000},
 	{0x0000a314, 0x00000000, 0x00000000, 0x0000f600, 0x0000f600, 0x00000000},
 	{0x0000a318, 0x00000000, 0x00000000, 0x00012800, 0x00012800, 0x00000000},
 	{0x0000a31c, 0x00000000, 0x00000000, 0x00016802, 0x00016802, 0x00000000},
 	{0x0000a320, 0x00000000, 0x00000000, 0x0001b805, 0x0001b805, 0x00000000},
 	{0x0000a324, 0x00000000, 0x00000000, 0x00021a80, 0x00021a80, 0x00000000},
 	{0x0000a328, 0x00000000, 0x00000000, 0x00028b00, 0x00028b00, 0x00000000},
 	{0x0000a32c, 0x00000000, 0x00000000, 0x0002ab40, 0x0002ab40, 0x00000000},
@@ -1603,25 +1603,25 @@ static const u32 ar9285Modes_high_power_tx_gain_9285_1_2[][6] = {
 	{0x00007840, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20},
 	{0x0000786c, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe},
 	{0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00},
 	{0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a216652, 0x0a216652, 0x0a22a652},
 	{0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
 	{0x0000a27c, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7},
 	{0x0000a394, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
 	{0x0000a398, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
 	{0x0000a3dc, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
 	{0x0000a3e0, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
 };
 
-static const u32 ar9285Modes_original_tx_gain_9285_1_2[][6] = {
+static __unused const u32 ar9285Modes_original_tx_gain_9285_1_2[][6] = {
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000},
 	{0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000},
 	{0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000},
 	{0x0000a310, 0x00000000, 0x00000000, 0x00022618, 0x00022618, 0x00000000},
 	{0x0000a314, 0x00000000, 0x00000000, 0x0002a6c9, 0x0002a6c9, 0x00000000},
 	{0x0000a318, 0x00000000, 0x00000000, 0x00031710, 0x00031710, 0x00000000},
 	{0x0000a31c, 0x00000000, 0x00000000, 0x00035718, 0x00035718, 0x00000000},
 	{0x0000a320, 0x00000000, 0x00000000, 0x00038758, 0x00038758, 0x00000000},
 	{0x0000a324, 0x00000000, 0x00000000, 0x0003c75a, 0x0003c75a, 0x00000000},
 	{0x0000a328, 0x00000000, 0x00000000, 0x0004075c, 0x0004075c, 0x00000000},
 	{0x0000a32c, 0x00000000, 0x00000000, 0x0004475e, 0x0004475e, 0x00000000},
@@ -1643,25 +1643,25 @@ static const u32 ar9285Modes_original_tx_gain_9285_1_2[][6] = {
 	{0x00007840, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20},
 	{0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4},
 	{0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04},
 	{0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a21a652, 0x0a21a652, 0x0a22a652},
 	{0x0000a278, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
 	{0x0000a27c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c},
 	{0x0000a394, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
 	{0x0000a398, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
 	{0x0000a3dc, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
 	{0x0000a3e0, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
 };
 
-static const u32 ar9285Modes_XE2_0_normal_power[][6] = {
+static __unused const u32 ar9285Modes_XE2_0_normal_power[][6] = {
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000},
 	{0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000},
 	{0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000},
 	{0x0000a310, 0x00000000, 0x00000000, 0x00022618, 0x00022618, 0x00000000},
 	{0x0000a314, 0x00000000, 0x00000000, 0x0002a6c9, 0x0002a6c9, 0x00000000},
 	{0x0000a318, 0x00000000, 0x00000000, 0x00031710, 0x00031710, 0x00000000},
 	{0x0000a31c, 0x00000000, 0x00000000, 0x00035718, 0x00035718, 0x00000000},
 	{0x0000a320, 0x00000000, 0x00000000, 0x00038758, 0x00038758, 0x00000000},
 	{0x0000a324, 0x00000000, 0x00000000, 0x0003c75a, 0x0003c75a, 0x00000000},
 	{0x0000a328, 0x00000000, 0x00000000, 0x0004075c, 0x0004075c, 0x00000000},
 	{0x0000a32c, 0x00000000, 0x00000000, 0x0004475e, 0x0004475e, 0x00000000},
@@ -1683,25 +1683,25 @@ static const u32 ar9285Modes_XE2_0_normal_power[][6] = {
 	{0x00007840, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c},
 	{0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4},
 	{0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04},
 	{0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a21a652, 0x0a21a652, 0x0a22a652},
 	{0x0000a278, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
 	{0x0000a27c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c},
 	{0x0000a394, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
 	{0x0000a398, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
 	{0x0000a3dc, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
 	{0x0000a3e0, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
 };
 
-static const u32 ar9285Modes_XE2_0_high_power[][6] = {
+static __unused const u32 ar9285Modes_XE2_0_high_power[][6] = {
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00000000, 0x00000000, 0x00006200, 0x00006200, 0x00000000},
 	{0x0000a308, 0x00000000, 0x00000000, 0x00008201, 0x00008201, 0x00000000},
 	{0x0000a30c, 0x00000000, 0x00000000, 0x0000b240, 0x0000b240, 0x00000000},
 	{0x0000a310, 0x00000000, 0x00000000, 0x0000d241, 0x0000d241, 0x00000000},
 	{0x0000a314, 0x00000000, 0x00000000, 0x0000f600, 0x0000f600, 0x00000000},
 	{0x0000a318, 0x00000000, 0x00000000, 0x00012800, 0x00012800, 0x00000000},
 	{0x0000a31c, 0x00000000, 0x00000000, 0x00016802, 0x00016802, 0x00000000},
 	{0x0000a320, 0x00000000, 0x00000000, 0x0001b805, 0x0001b805, 0x00000000},
 	{0x0000a324, 0x00000000, 0x00000000, 0x00021a80, 0x00021a80, 0x00000000},
 	{0x0000a328, 0x00000000, 0x00000000, 0x00028b00, 0x00028b00, 0x00000000},
 	{0x0000a32c, 0x00000000, 0x00000000, 0x0002ab40, 0x0002ab40, 0x00000000},
@@ -1723,53 +1723,53 @@ static const u32 ar9285Modes_XE2_0_high_power[][6] = {
 	{0x00007840, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c},
 	{0x0000786c, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe},
 	{0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00},
 	{0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a216652, 0x0a216652, 0x0a22a652},
 	{0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
 	{0x0000a27c, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7},
 	{0x0000a394, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
 	{0x0000a398, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
 	{0x0000a3dc, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
 	{0x0000a3e0, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
 };
 
-static const u32 ar9285PciePhy_clkreq_always_on_L1_9285_1_2[][2] = {
+static __unused const u32 ar9285PciePhy_clkreq_always_on_L1_9285_1_2[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffd},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9285PciePhy_clkreq_off_L1_9285_1_2[][2] = {
+static __unused const u32 ar9285PciePhy_clkreq_off_L1_9285_1_2[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffc},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9287Modes_9287_1_1[][6] = {
+static __unused const u32 ar9287Modes_9287_1_1[][6] = {
 	{0x00001030, 0x00000000, 0x00000000, 0x000002c0, 0x00000160, 0x000001e0},
 	{0x00001070, 0x00000000, 0x00000000, 0x00000318, 0x0000018c, 0x000001e0},
 	{0x000010b0, 0x00000000, 0x00000000, 0x00007c70, 0x00003e38, 0x00001180},
 	{0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008},
 	{0x00008014, 0x00000000, 0x00000000, 0x10801600, 0x08400b00, 0x06e006e0},
 	{0x0000801c, 0x00000000, 0x00000000, 0x12e00057, 0x12e0002b, 0x0988004f},
 	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810},
 	{0x000081d0, 0x00003200, 0x00003200, 0x0000320a, 0x0000320a, 0x0000320a},
 	{0x00008318, 0x00000000, 0x00000000, 0x00006880, 0x00003440, 0x00006880},
 	{0x00009804, 0x00000000, 0x00000000, 0x000003c4, 0x00000300, 0x00000303},
 	{0x00009820, 0x00000000, 0x00000000, 0x02020200, 0x02020200, 0x02020200},
 	{0x00009824, 0x00000000, 0x00000000, 0x01000e0e, 0x01000e0e, 0x01000e0e},
@@ -1797,25 +1797,25 @@ static const u32 ar9287Modes_9287_1_1[][6] = {
 	{0x000099bc, 0x00000000, 0x00000000, 0x00000c00, 0x00000c00, 0x00000c00},
 	{0x000099c0, 0x00000000, 0x00000000, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
 	{0x0000a204, 0x00000440, 0x00000440, 0x00000444, 0x00000444, 0x00000444},
 	{0x0000a20c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b20c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a21c, 0x1803800a, 0x1803800a, 0x1883800a, 0x1883800a, 0x1883800a},
 	{0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000},
 	{0x0000a250, 0x00000000, 0x00000000, 0x0004a000, 0x0004a000, 0x0004a000},
 	{0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e},
 	{0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 };
 
-static const u32 ar9287Common_9287_1_1[][2] = {
+static __unused const u32 ar9287Common_9287_1_1[][2] = {
 	/* Addr      allmodes  */
 	{0x0000000c, 0x00000000},
 	{0x00000030, 0x00020015},
 	{0x00000034, 0x00000005},
 	{0x00000040, 0x00000000},
 	{0x00000044, 0x00000008},
 	{0x00000048, 0x00000008},
 	{0x0000004c, 0x00000010},
 	{0x00000050, 0x00000000},
 	{0x00000054, 0x0000001f},
 	{0x00000800, 0x00000000},
 	{0x00000804, 0x00000000},
@@ -2166,39 +2166,39 @@ static const u32 ar9287Common_9287_1_1[][2] = {
 	{0x00007894, 0x006d8000},
 	{0x00007898, 0x48100000},
 	{0x0000789c, 0x00000000},
 	{0x000078a0, 0x08000000},
 	{0x000078a4, 0x0007ffd8},
 	{0x000078a8, 0x0007ffd8},
 	{0x000078ac, 0x001c0020},
 	{0x000078b0, 0x00060aeb},
 	{0x000078b4, 0x40008080},
 	{0x000078b8, 0x2a850160},
 };
 
-static const u32 ar9287Common_normal_cck_fir_coeff_9287_1_1[][2] = {
+static __unused const u32 ar9287Common_normal_cck_fir_coeff_9287_1_1[][2] = {
 	/* Addr      allmodes  */
 	{0x0000a1f4, 0x00fffeff},
 	{0x0000a1f8, 0x00f5f9ff},
 	{0x0000a1fc, 0xb79f6427},
 };
 
-static const u32 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1[][2] = {
+static __unused const u32 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1[][2] = {
 	/* Addr      allmodes  */
 	{0x0000a1f4, 0x00000000},
 	{0x0000a1f8, 0xefff0301},
 	{0x0000a1fc, 0xca9228ee},
 };
 
-static const u32 ar9287Modes_tx_gain_9287_1_1[][6] = {
+static __unused const u32 ar9287Modes_tx_gain_9287_1_1[][6] = {
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00000000, 0x00000000, 0x00004002, 0x00004002, 0x00004002},
 	{0x0000a308, 0x00000000, 0x00000000, 0x00008004, 0x00008004, 0x00008004},
 	{0x0000a30c, 0x00000000, 0x00000000, 0x0000c00a, 0x0000c00a, 0x0000c00a},
 	{0x0000a310, 0x00000000, 0x00000000, 0x0001000c, 0x0001000c, 0x0001000c},
 	{0x0000a314, 0x00000000, 0x00000000, 0x0001420b, 0x0001420b, 0x0001420b},
 	{0x0000a318, 0x00000000, 0x00000000, 0x0001824a, 0x0001824a, 0x0001824a},
 	{0x0000a31c, 0x00000000, 0x00000000, 0x0001c44a, 0x0001c44a, 0x0001c44a},
 	{0x0000a320, 0x00000000, 0x00000000, 0x0002064a, 0x0002064a, 0x0002064a},
 	{0x0000a324, 0x00000000, 0x00000000, 0x0002484a, 0x0002484a, 0x0002484a},
 	{0x0000a328, 0x00000000, 0x00000000, 0x00028a4a, 0x00028a4a, 0x00028a4a},
 	{0x0000a32c, 0x00000000, 0x00000000, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
@@ -2228,25 +2228,25 @@ static const u32 ar9287Modes_tx_gain_9287_1_1[][6] = {
 	{0x0000a7b4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7b8, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7bc, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7c0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7c4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7c8, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7cc, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7d0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a7d4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe},
 	{0x0000a274, 0x0a180000, 0x0a180000, 0x0a1aa000, 0x0a1aa000, 0x0a1aa000},
 };
 
-static const u32 ar9287Modes_rx_gain_9287_1_1[][6] = {
+static __unused const u32 ar9287Modes_rx_gain_9287_1_1[][6] = {
 	{0x00009a00, 0x00000000, 0x00000000, 0x0000a120, 0x0000a120, 0x0000a120},
 	{0x00009a04, 0x00000000, 0x00000000, 0x0000a124, 0x0000a124, 0x0000a124},
 	{0x00009a08, 0x00000000, 0x00000000, 0x0000a128, 0x0000a128, 0x0000a128},
 	{0x00009a0c, 0x00000000, 0x00000000, 0x0000a12c, 0x0000a12c, 0x0000a12c},
 	{0x00009a10, 0x00000000, 0x00000000, 0x0000a130, 0x0000a130, 0x0000a130},
 	{0x00009a14, 0x00000000, 0x00000000, 0x0000a194, 0x0000a194, 0x0000a194},
 	{0x00009a18, 0x00000000, 0x00000000, 0x0000a198, 0x0000a198, 0x0000a198},
 	{0x00009a1c, 0x00000000, 0x00000000, 0x0000a20c, 0x0000a20c, 0x0000a20c},
 	{0x00009a20, 0x00000000, 0x00000000, 0x0000a210, 0x0000a210, 0x0000a210},
 	{0x00009a24, 0x00000000, 0x00000000, 0x0000a284, 0x0000a284, 0x0000a284},
 	{0x00009a28, 0x00000000, 0x00000000, 0x0000a288, 0x0000a288, 0x0000a288},
 	{0x00009a2c, 0x00000000, 0x00000000, 0x0000a28c, 0x0000a28c, 0x0000a28c},
@@ -2489,53 +2489,53 @@ static const u32 ar9287Modes_rx_gain_9287_1_1[][6] = {
 	{0x0000abe0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x0000abe4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x0000abe8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x0000abec, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x0000abf0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x0000abf4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x0000abf8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x0000abfc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb},
 	{0x00009848, 0x00000000, 0x00000000, 0x00001067, 0x00001067, 0x00001067},
 	{0x0000a848, 0x00000000, 0x00000000, 0x00001067, 0x00001067, 0x00001067},
 };
 
-static const u32 ar9287PciePhy_clkreq_always_on_L1_9287_1_1[][2] = {
+static __unused const u32 ar9287PciePhy_clkreq_always_on_L1_9287_1_1[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffd},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9287PciePhy_clkreq_off_L1_9287_1_1[][2] = {
+static __unused const u32 ar9287PciePhy_clkreq_off_L1_9287_1_1[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x9248fd00},
 	{0x00004040, 0x24924924},
 	{0x00004040, 0xa8000019},
 	{0x00004040, 0x13160820},
 	{0x00004040, 0xe5980560},
 	{0x00004040, 0xc01dcffc},
 	{0x00004040, 0x1aaabe41},
 	{0x00004040, 0xbe105554},
 	{0x00004040, 0x00043007},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9271Modes_9271[][6] = {
+static __unused const u32 ar9271Modes_9271[][6] = {
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
 	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180},
 	{0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008},
 	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0},
 	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f},
 	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880},
 	{0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303},
 	{0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
 	{0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
 	{0x00009828, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001},
 	{0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
@@ -2823,25 +2823,25 @@ static const u32 ar9271Modes_9271[][6] = {
 	{0x0000abf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000},
 	{0x0000abf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000},
 	{0x0000abfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000},
 	{0x0000a204, 0x00000004, 0x00000004, 0x00000004, 0x00000004, 0x00000004},
 	{0x0000a20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000},
 	{0x0000b20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000},
 	{0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
 	{0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000},
 	{0x0000a250, 0x0004f000, 0x0004f000, 0x0004a000, 0x0004a000, 0x0004a000},
 	{0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e},
 };
 
-static const u32 ar9271Common_9271[][2] = {
+static __unused const u32 ar9271Common_9271[][2] = {
 	/* Addr      allmodes  */
 	{0x0000000c, 0x00000000},
 	{0x00000030, 0x00020045},
 	{0x00000034, 0x00000005},
 	{0x00000040, 0x00000000},
 	{0x00000044, 0x00000008},
 	{0x00000048, 0x00000008},
 	{0x0000004c, 0x00000010},
 	{0x00000050, 0x00000000},
 	{0x00000054, 0x0000001f},
 	{0x00000800, 0x00000000},
 	{0x00000804, 0x00000000},
@@ -3152,55 +3152,55 @@ static const u32 ar9271Common_9271[][2] = {
 	{0x0000d360, 0x0fffffe7},
 	{0x0000d364, 0x17ffffe5},
 	{0x0000d368, 0x1fffffe4},
 	{0x0000d36c, 0x37ffffe3},
 	{0x0000d370, 0x3fffffe3},
 	{0x0000d374, 0x57ffffe3},
 	{0x0000d378, 0x5fffffe2},
 	{0x0000d37c, 0x7fffffe2},
 	{0x0000d380, 0x7f3c7bba},
 	{0x0000d384, 0xf3307ff0},
 };
 
-static const u32 ar9271Common_normal_cck_fir_coeff_9271[][2] = {
+static __unused const u32 ar9271Common_normal_cck_fir_coeff_9271[][2] = {
 	/* Addr      allmodes  */
 	{0x0000a1f4, 0x00fffeff},
 	{0x0000a1f8, 0x00f5f9ff},
 	{0x0000a1fc, 0xb79f6427},
 };
 
-static const u32 ar9271Common_japan_2484_cck_fir_coeff_9271[][2] = {
+static __unused const u32 ar9271Common_japan_2484_cck_fir_coeff_9271[][2] = {
 	/* Addr      allmodes  */
 	{0x0000a1f4, 0x00000000},
 	{0x0000a1f8, 0xefff0301},
 	{0x0000a1fc, 0xca9228ee},
 };
 
-static const u32 ar9271Modes_9271_1_0_only[][6] = {
+static __unused const u32 ar9271Modes_9271_1_0_only[][6] = {
 	{0x00009910, 0x30002311, 0x30002311, 0x30002311, 0x30002311, 0x30002311},
 	{0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
 };
 
-static const u32 ar9271Modes_9271_ANI_reg[][6] = {
+static __unused const u32 ar9271Modes_9271_ANI_reg[][6] = {
 	{0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2},
 	{0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e, 0x3139605e},
 	{0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e},
 	{0x0000986c, 0x06903881, 0x06903881, 0x06903881, 0x06903881, 0x06903881},
 	{0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
 	{0x0000a208, 0x803e68c8, 0x803e68c8, 0x803e68c8, 0x803e68c8, 0x803e68c8},
 	{0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d},
 	{0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
 };
 
-static const u32 ar9271Modes_normal_power_tx_gain_9271[][6] = {
+static __unused const u32 ar9271Modes_normal_power_tx_gain_9271[][6] = {
 	{0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000},
 	{0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000},
 	{0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000},
 	{0x0000a310, 0x00000000, 0x00000000, 0x0001e610, 0x0001e610, 0x00000000},
 	{0x0000a314, 0x00000000, 0x00000000, 0x0002d6d0, 0x0002d6d0, 0x00000000},
 	{0x0000a318, 0x00000000, 0x00000000, 0x00039758, 0x00039758, 0x00000000},
 	{0x0000a31c, 0x00000000, 0x00000000, 0x0003b759, 0x0003b759, 0x00000000},
 	{0x0000a320, 0x00000000, 0x00000000, 0x0003d75a, 0x0003d75a, 0x00000000},
 	{0x0000a324, 0x00000000, 0x00000000, 0x0004175c, 0x0004175c, 0x00000000},
 	{0x0000a328, 0x00000000, 0x00000000, 0x0004575e, 0x0004575e, 0x00000000},
 	{0x0000a32c, 0x00000000, 0x00000000, 0x0004979f, 0x0004979f, 0x00000000},
@@ -3218,25 +3218,25 @@ static const u32 ar9271Modes_normal_power_tx_gain_9271[][6] = {
 	{0x00007824, 0x00d8abff, 0x00d8abff, 0x00d8abff, 0x00d8abff, 0x00d8abff},
 	{0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4},
 	{0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04},
 	{0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a218652, 0x0a218652, 0x0a22a652},
 	{0x0000a278, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd},
 	{0x0000a27c, 0x050e83bd, 0x050e83bd, 0x050e83bd, 0x050e83bd, 0x050e83bd},
 	{0x0000a394, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd},
 	{0x0000a398, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd},
 	{0x0000a3dc, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd},
 	{0x0000a3e0, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd},
 };
 
-static const u32 ar9271Modes_high_power_tx_gain_9271[][6] = {
+static __unused const u32 ar9271Modes_high_power_tx_gain_9271[][6] = {
 	{0x0000a300, 0x00000000, 0x00000000, 0x00010000, 0x00010000, 0x00000000},
 	{0x0000a304, 0x00000000, 0x00000000, 0x00016200, 0x00016200, 0x00000000},
 	{0x0000a308, 0x00000000, 0x00000000, 0x00018201, 0x00018201, 0x00000000},
 	{0x0000a30c, 0x00000000, 0x00000000, 0x0001b240, 0x0001b240, 0x00000000},
 	{0x0000a310, 0x00000000, 0x00000000, 0x0001d241, 0x0001d241, 0x00000000},
 	{0x0000a314, 0x00000000, 0x00000000, 0x0001f600, 0x0001f600, 0x00000000},
 	{0x0000a318, 0x00000000, 0x00000000, 0x00022800, 0x00022800, 0x00000000},
 	{0x0000a31c, 0x00000000, 0x00000000, 0x00026802, 0x00026802, 0x00000000},
 	{0x0000a320, 0x00000000, 0x00000000, 0x0002b805, 0x0002b805, 0x00000000},
 	{0x0000a324, 0x00000000, 0x00000000, 0x0002ea41, 0x0002ea41, 0x00000000},
 	{0x0000a328, 0x00000000, 0x00000000, 0x00038b00, 0x00038b00, 0x00000000},
 	{0x0000a32c, 0x00000000, 0x00000000, 0x0003ab40, 0x0003ab40, 0x00000000},
--- a/src/drivers/net/ath/ath9k/ar9003_2p2_initvals.h
+++ b/src/drivers/net/ath/ath9k/ar9003_2p2_initvals.h
@@ -10,38 +10,38 @@
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
 #ifndef INITVALS_9003_2P2_H
 #define INITVALS_9003_2P2_H
 
 /* AR9003 2.2 */
 
-static const u32 ar9300_2p2_radio_postamble[][5] = {
+static __unused const u32 ar9300_2p2_radio_postamble[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
 	{0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
 	{0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
 	{0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
 	{0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
 	{0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
 };
 
-static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = {
+static __unused const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
 	{0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
 	{0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
 	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
@@ -129,38 +129,38 @@ static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = {
 	{0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
 	{0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001},
 	{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 	{0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
 	{0x00016448, 0x62480001, 0x62480001, 0x62480001, 0x62480001},
 	{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 	{0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
 	{0x00016848, 0x62480001, 0x62480001, 0x62480001, 0x62480001},
 	{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 };
 
-static const u32 ar9300Modes_fast_clock_2p2[][3] = {
+static __unused const u32 ar9300Modes_fast_clock_2p2[][3] = {
 	/* Addr      5G_HT20     5G_HT40   */
 	{0x00001030, 0x00000268, 0x000004d0},
 	{0x00001070, 0x0000018c, 0x00000318},
 	{0x000010b0, 0x00000fd0, 0x00001fa0},
 	{0x00008014, 0x044c044c, 0x08980898},
 	{0x0000801c, 0x148ec02b, 0x148ec057},
 	{0x00008318, 0x000044c0, 0x00008980},
 	{0x00009e00, 0x0372131c, 0x0372131c},
 	{0x0000a230, 0x0000000b, 0x00000016},
 	{0x0000a254, 0x00000898, 0x00001130},
 };
 
-static const u32 ar9300_2p2_radio_core[][2] = {
+static __unused const u32 ar9300_2p2_radio_core[][2] = {
 	/* Addr      allmodes  */
 	{0x00016000, 0x36db6db6},
 	{0x00016004, 0x6db6db40},
 	{0x00016008, 0x73f00000},
 	{0x0001600c, 0x00000000},
 	{0x00016040, 0x7f80fff8},
 	{0x0001604c, 0x76d005b5},
 	{0x00016050, 0x556cf031},
 	{0x00016054, 0x13449440},
 	{0x00016058, 0x0c51c92c},
 	{0x0001605c, 0x3db7fffc},
 	{0x00016060, 0xfffffffc},
@@ -286,25 +286,25 @@ static const u32 ar9300_2p2_radio_core[][2] = {
 	{0x00016bb0, 0x00000000},
 	{0x00016bb4, 0x00000000},
 	{0x00016bb8, 0x00000000},
 	{0x00016bbc, 0x00000000},
 	{0x00016bc0, 0x000000a0},
 	{0x00016bc4, 0x000c0000},
 	{0x00016bc8, 0x14021402},
 	{0x00016bcc, 0x00001402},
 	{0x00016bd0, 0x00000000},
 	{0x00016bd4, 0x00000000},
 };
 
-static const u32 ar9300Common_rx_gain_table_merlin_2p2[][2] = {
+static __unused const u32 ar9300Common_rx_gain_table_merlin_2p2[][2] = {
 	/* Addr      allmodes  */
 	{0x0000a000, 0x02000101},
 	{0x0000a004, 0x02000102},
 	{0x0000a008, 0x02000103},
 	{0x0000a00c, 0x02000104},
 	{0x0000a010, 0x02000200},
 	{0x0000a014, 0x02000201},
 	{0x0000a018, 0x02000202},
 	{0x0000a01c, 0x02000203},
 	{0x0000a020, 0x02000204},
 	{0x0000a024, 0x02000205},
 	{0x0000a028, 0x02000208},
@@ -546,42 +546,42 @@ static const u32 ar9300Common_rx_gain_table_merlin_2p2[][2] = {
 	{0x0000b1d8, 0x00000776},
 	{0x0000b1dc, 0x00000776},
 	{0x0000b1e0, 0x00000776},
 	{0x0000b1e4, 0x00000776},
 	{0x0000b1e8, 0x00000776},
 	{0x0000b1ec, 0x00000776},
 	{0x0000b1f0, 0x00000776},
 	{0x0000b1f4, 0x00000776},
 	{0x0000b1f8, 0x00000776},
 	{0x0000b1fc, 0x00000776},
 };
 
-static const u32 ar9300_2p2_mac_postamble[][5] = {
+static __unused const u32 ar9300_2p2_mac_postamble[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
 	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
 	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
 	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
 	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
 	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
 	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
 };
 
-static const u32 ar9300_2p2_soc_postamble[][5] = {
+static __unused const u32 ar9300_2p2_soc_postamble[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023},
 };
 
-static const u32 ar9200_merlin_2p2_radio_core[][2] = {
+static __unused const u32 ar9200_merlin_2p2_radio_core[][2] = {
 	/* Addr      allmodes  */
 	{0x00007800, 0x00040000},
 	{0x00007804, 0xdb005012},
 	{0x00007808, 0x04924914},
 	{0x0000780c, 0x21084210},
 	{0x00007810, 0x6d801300},
 	{0x00007814, 0x0019beff},
 	{0x00007818, 0x07e41000},
 	{0x0000781c, 0x00392000},
 	{0x00007820, 0x92592480},
 	{0x00007824, 0x00040000},
 	{0x00007828, 0xdb005012},
@@ -605,25 +605,25 @@ static const u32 ar9200_merlin_2p2_radio_core[][2] = {
 	{0x00007870, 0x807ec400},
 	{0x00007874, 0x001b6db0},
 	{0x00007878, 0x00376b63},
 	{0x0000787c, 0x06db6db6},
 	{0x00007880, 0x006d8000},
 	{0x00007884, 0xffeffffe},
 	{0x00007888, 0xffeffffe},
 	{0x0000788c, 0x00010000},
 	{0x00007890, 0x02060aeb},
 	{0x00007894, 0x5a108000},
 };
 
-static const u32 ar9300_2p2_baseband_postamble[][5] = {
+static __unused const u32 ar9300_2p2_baseband_postamble[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
 	{0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
 	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
 	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
 	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
 	{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
 	{0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
 	{0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
 	{0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
 	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
 	{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
@@ -661,25 +661,25 @@ static const u32 ar9300_2p2_baseband_postamble[][5] = {
 	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
 	{0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
 	{0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
 	{0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
 	{0x0000be04, 0x001c0000, 0x001c0000, 0x001c0000, 0x001c0000},
 	{0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
 	{0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
 	{0x0000c284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
 };
 
-static const u32 ar9300_2p2_baseband_core[][2] = {
+static __unused const u32 ar9300_2p2_baseband_core[][2] = {
 	/* Addr      allmodes  */
 	{0x00009800, 0xafe68e30},
 	{0x00009804, 0xfd14e000},
 	{0x00009808, 0x9c0a9f6b},
 	{0x0000980c, 0x04900000},
 	{0x00009814, 0x9280c00a},
 	{0x00009818, 0x00000000},
 	{0x0000981c, 0x00020028},
 	{0x00009834, 0x6400a290},
 	{0x00009838, 0x0108ecff},
 	{0x0000983c, 0x0d000600},
 	{0x00009880, 0x201fff00},
@@ -824,25 +824,25 @@ static const u32 ar9300_2p2_baseband_core[][2] = {
 	{0x0000b8f4, 0x00000000},
 	{0x0000c2d0, 0x00000080},
 	{0x0000c2d4, 0x00000000},
 	{0x0000c2ec, 0x00000000},
 	{0x0000c2f0, 0x00000000},
 	{0x0000c2f4, 0x00000000},
 	{0x0000c2f8, 0x00000000},
 	{0x0000c408, 0x0e79e5c0},
 	{0x0000c40c, 0x00820820},
 	{0x0000c420, 0x00000000},
 };
 
-static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
+static __unused const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
 	{0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
 	{0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
 	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
 	{0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
 	{0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
@@ -930,25 +930,25 @@ static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
 	{0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
 	{0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
 	{0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
 	{0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
 	{0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
 	{0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
 	{0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
 	{0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
 	{0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
 };
 
-static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = {
+static __unused const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
 	{0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
 	{0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
 	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
 	{0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
 	{0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
@@ -1036,25 +1036,25 @@ static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = {
 	{0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},
 	{0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},
 	{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 	{0x00016444, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},
 	{0x00016448, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},
 	{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 	{0x00016844, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4},
 	{0x00016848, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001},
 	{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 };
 
-static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
+static __unused const u32 ar9300Common_rx_gain_table_2p2[][2] = {
 	/* Addr      allmodes  */
 	{0x0000a000, 0x00010000},
 	{0x0000a004, 0x00030002},
 	{0x0000a008, 0x00050004},
 	{0x0000a00c, 0x00810080},
 	{0x0000a010, 0x00830082},
 	{0x0000a014, 0x01810180},
 	{0x0000a018, 0x01830182},
 	{0x0000a01c, 0x01850184},
 	{0x0000a020, 0x01890188},
 	{0x0000a024, 0x018b018a},
 	{0x0000a028, 0x018d018c},
@@ -1296,25 +1296,25 @@ static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
 	{0x0000b1d8, 0x00000000},
 	{0x0000b1dc, 0x00000000},
 	{0x0000b1e0, 0x00000000},
 	{0x0000b1e4, 0x00000000},
 	{0x0000b1e8, 0x00000000},
 	{0x0000b1ec, 0x00000000},
 	{0x0000b1f0, 0x00000396},
 	{0x0000b1f4, 0x00000396},
 	{0x0000b1f8, 0x00000396},
 	{0x0000b1fc, 0x00000196},
 };
 
-static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = {
+static __unused const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = {
 	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 	{0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
 	{0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
 	{0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
 	{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
@@ -1402,25 +1402,25 @@ static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = {
 	{0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 	{0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
 	{0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
 	{0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 	{0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
 	{0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
 	{0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 	{0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
 	{0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
 	{0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 };
 
-static const u32 ar9300_2p2_mac_core[][2] = {
+static __unused const u32 ar9300_2p2_mac_core[][2] = {
 	/* Addr      allmodes  */
 	{0x00000008, 0x00000000},
 	{0x00000030, 0x00020085},
 	{0x00000034, 0x00000005},
 	{0x00000040, 0x00000000},
 	{0x00000044, 0x00000000},
 	{0x00000048, 0x00000008},
 	{0x0000004c, 0x00000010},
 	{0x00000050, 0x00000000},
 	{0x00001040, 0x002ffc0f},
 	{0x00001044, 0x002ffc0f},
 	{0x00001048, 0x002ffc0f},
@@ -1561,25 +1561,25 @@ static const u32 ar9300_2p2_mac_core[][2] = {
 	{0x000083ac, 0x33332210},
 	{0x000083b0, 0x33332210},
 	{0x000083b4, 0x33332210},
 	{0x000083b8, 0x33332210},
 	{0x000083bc, 0x00000000},
 	{0x000083c0, 0x00000000},
 	{0x000083c4, 0x00000000},
 	{0x000083c8, 0x00000000},
 	{0x000083cc, 0x00000200},
 	{0x000083d0, 0x000301ff},
 };
 
-static const u32 ar9300Common_wo_xlna_rx_gain_table_2p2[][2] = {
+static __unused const u32 ar9300Common_wo_xlna_rx_gain_table_2p2[][2] = {
 	/* Addr      allmodes  */
 	{0x0000a000, 0x00010000},
 	{0x0000a004, 0x00030002},
 	{0x0000a008, 0x00050004},
 	{0x0000a00c, 0x00810080},
 	{0x0000a010, 0x00830082},
 	{0x0000a014, 0x01810180},
 	{0x0000a018, 0x01830182},
 	{0x0000a01c, 0x01850184},
 	{0x0000a020, 0x01890188},
 	{0x0000a024, 0x018b018a},
 	{0x0000a028, 0x018d018c},
@@ -1821,44 +1821,44 @@ static const u32 ar9300Common_wo_xlna_rx_gain_table_2p2[][2] = {
 	{0x0000b1d8, 0x00000000},
 	{0x0000b1dc, 0x00000000},
 	{0x0000b1e0, 0x00000000},
 	{0x0000b1e4, 0x00000000},
 	{0x0000b1e8, 0x00000000},
 	{0x0000b1ec, 0x00000000},
 	{0x0000b1f0, 0x00000396},
 	{0x0000b1f4, 0x00000396},
 	{0x0000b1f8, 0x00000396},
 	{0x0000b1fc, 0x00000196},
 };
 
-static const u32 ar9300_2p2_soc_preamble[][2] = {
+static __unused const u32 ar9300_2p2_soc_preamble[][2] = {
 	/* Addr      allmodes  */
 	{0x000040a4, 0x00a0c1c9},
 	{0x00007008, 0x00000000},
 	{0x00007020, 0x00000000},
 	{0x00007034, 0x00000002},
 	{0x00007038, 0x000004c2},
 	{0x00007048, 0x00000008},
 };
 
-static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2[][2] = {
+static __unused const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x0821265e},
 	{0x00004040, 0x0008003b},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = {
+static __unused const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x08253e5e},
 	{0x00004040, 0x0008003b},
 	{0x00004044, 0x00000000},
 };
 
-static const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = {
+static __unused const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = {
 	/* Addr      allmodes  */
 	{0x00004040, 0x08213e5e},
 	{0x00004040, 0x0008003b},
 	{0x00004044, 0x00000000},
 };
 
 #endif /* INITVALS_9003_2P2_H */
--- a/src/drivers/net/ath/ath9k/ar9340_initvals.h
+++ b/src/drivers/net/ath/ath9k/ar9340_initvals.h
@@ -8,34 +8,34 @@
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
 #ifndef INITVALS_9340_H
 #define INITVALS_9340_H
 
-static const u32 ar9340_1p0_radio_postamble[][5] = {
+static __unused const u32 ar9340_1p0_radio_postamble[][5] = {
 	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */
 	{0x000160ac, 0xa4646800, 0xa4646800, 0xa4646800, 0xa4646800},
 	{0x0001610c, 0x08000000, 0x08000000, 0x00000000, 0x00000000},
 	{0x00016140, 0x10804000, 0x10804000, 0x50804000, 0x50804000},
 	{0x0001650c, 0x08000000, 0x08000000, 0x00000000, 0x00000000},
 	{0x00016540, 0x10804000, 0x10804000, 0x50804000, 0x50804000},
 };
 
-static const u32 ar9340Modes_lowest_ob_db_tx_gain_table_1p0[][5] = {
+static __unused const u32 ar9340Modes_lowest_ob_db_tx_gain_table_1p0[][5] = {
 	/*   Addr     5G_HT20     5G_HT40     2G_HT40     2G_HT20  */
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
 	{0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
 	{0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
 	{0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
 	{0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
@@ -90,38 +90,38 @@ static const u32 ar9340Modes_lowest_ob_db_tx_gain_table_1p0[][5] = {
 	{0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x00016044, 0x056db2db, 0x056db2db, 0x056db2db, 0x056db2db},
 	{0x00016048, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
 	{0x00016444, 0x056db2db, 0x056db2db, 0x056db2db, 0x056db2db},
 	{0x00016448, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
 };
 
-static const u32 ar9340Modes_fast_clock_1p0[][3] = {
+static __unused const u32 ar9340Modes_fast_clock_1p0[][3] = {
 	/*  Addr      5G_HT20     5G_HT40  */
 	{0x00001030, 0x00000268, 0x000004d0},
 	{0x00001070, 0x0000018c, 0x00000318},
 	{0x000010b0, 0x00000fd0, 0x00001fa0},
 	{0x00008014, 0x044c044c, 0x08980898},
 	{0x0000801c, 0x148ec02b, 0x148ec057},
 	{0x00008318, 0x000044c0, 0x00008980},
 	{0x00009e00, 0x03721821, 0x03721821},
 	{0x0000a230, 0x0000000b, 0x00000016},
 	{0x0000a254, 0x00000898, 0x00001130},
 };
 
-static const u32 ar9340_1p0_radio_core[][2] = {
+static __unused const u32 ar9340_1p0_radio_core[][2] = {
 	/*  Addr     allmodes  */
 	{0x00016000, 0x36db6db6},
 	{0x00016004, 0x6db6db40},
 	{0x00016008, 0x73f00000},
 	{0x0001600c, 0x00000000},
 	{0x00016040, 0x7f80fff8},
 	{0x00016044, 0x03b6d2db},
 	{0x00016048, 0x24925266},
 	{0x0001604c, 0x000f0278},
 	{0x00016050, 0x6db6db6c},
 	{0x00016054, 0x6db60000},
 	{0x00016080, 0x00080000},
@@ -209,48 +209,48 @@ static const u32 ar9340_1p0_radio_core[][2] = {
 	{0x000167b0, 0x00000000},
 	{0x000167b4, 0x00000000},
 	{0x000167b8, 0x00000000},
 	{0x000167bc, 0x00000000},
 	{0x000167c0, 0x000000a0},
 	{0x000167c4, 0x000c0000},
 	{0x000167c8, 0x14021402},
 	{0x000167cc, 0x00001402},
 	{0x000167d0, 0x00000000},
 	{0x000167d4, 0x00000000},
 };
 
-static const u32 ar9340_1p0_radio_core_40M[][2] = {
+static __unused const u32 ar9340_1p0_radio_core_40M[][2] = {
 	{0x0001609c, 0x02566f3a},
 	{0x000160ac, 0xa4647c00},
 	{0x000160b0, 0x01885f5a},
 };
 
-static const u32 ar9340_1p0_mac_postamble[][5] = {
+static __unused const u32 ar9340_1p0_mac_postamble[][5] = {
 	/* Addr       5G_HT20     5G_HT40     2G_HT40    2G_HT20  */
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
 	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
 	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
 	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
 	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
 	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
 	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
 };
 
-static const u32 ar9340_1p0_soc_postamble[][5] = {
+static __unused const u32 ar9340_1p0_soc_postamble[][5] = {
 	/*   Addr     5G_HT20     5G_HT40     2G_HT40     2G_HT20  */
 	{0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023},
 };
 
-static const u32 ar9340_1p0_baseband_postamble[][5] = {
+static __unused const u32 ar9340_1p0_baseband_postamble[][5] = {
 	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */
 	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
 	{0x00009820, 0x206a022e, 0x206a022e, 0x206a022e, 0x206a022e},
 	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
 	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
 	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
 	{0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
 	{0x00009c00, 0x00000044, 0x000000c4, 0x000000c4, 0x00000044},
 	{0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
 	{0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
 	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
 	{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec88d2e, 0x7ec88d2e},
@@ -279,25 +279,25 @@ static const u32 ar9340_1p0_baseband_postamble[][5] = {
 	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
 	{0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982},
 	{0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
 	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
 	{0x0000ae04, 0x00180000, 0x00180000, 0x00180000, 0x00180000},
 	{0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
 	{0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
 	{0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
 };
 
-static const u32 ar9340_1p0_baseband_core[][2] = {
+static __unused const u32 ar9340_1p0_baseband_core[][2] = {
 	/*  Addr     allmodes  */
 	{0x00009800, 0xafe68e30},
 	{0x00009804, 0xfd14e000},
 	{0x00009808, 0x9c0a9f6b},
 	{0x0000980c, 0x04900000},
 	{0x00009814, 0xb280c00a},
 	{0x00009818, 0x00000000},
 	{0x0000981c, 0x00020028},
 	{0x00009834, 0x5f3ca3de},
 	{0x00009838, 0x0108ecff},
 	{0x0000983c, 0x14750600},
 	{0x00009880, 0x201fff00},
@@ -455,25 +455,25 @@ static const u32 ar9340_1p0_baseband_core[][2] = {
 	{0x0000b2e0, 0x00000000},
 	{0x0000b2e4, 0x00000000},
 	{0x0000b2e8, 0x00000000},
 	{0x0000b2ec, 0x00000000},
 	{0x0000b2f0, 0x00000000},
 	{0x0000b2f4, 0x00000000},
 	{0x0000b2f8, 0x00000000},
 	{0x0000b408, 0x0e79e5c0},
 	{0x0000b40c, 0x00820820},
 	{0x0000b420, 0x00000000},
 };
 
-static const u32 ar9340Modes_high_power_tx_gain_table_1p0[][5] = {
+static __unused const u32 ar9340Modes_high_power_tx_gain_table_1p0[][5] = {
 	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */
 	{0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
 	{0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
 	{0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
 	{0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
 	{0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
 	{0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
 	{0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
@@ -528,25 +528,25 @@ static const u32 ar9340Modes_high_power_tx_gain_table_1p0[][5] = {
 	{0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x00016044, 0x056db2db, 0x056db2db, 0x056db2db, 0x056db2db},
 	{0x00016048, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
 	{0x00016444, 0x056db2db, 0x056db2db, 0x056db2db, 0x056db2db},
 	{0x00016448, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
 };
 
-static const u32 ar9340Modes_high_ob_db_tx_gain_table_1p0[][5] = {
+static __unused const u32 ar9340Modes_high_ob_db_tx_gain_table_1p0[][5] = {
 	/*  Addr       5G_HT20    5G_HT40     2G_HT40     2G_HT20  */
 	{0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
 	{0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
 	{0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
 	{0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
 	{0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
 	{0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
 	{0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
@@ -600,25 +600,25 @@ static const u32 ar9340Modes_high_ob_db_tx_gain_table_1p0[][5] = {
 	{0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x00016044, 0x03b6d2e4, 0x03b6d2e4, 0x03b6d2e4, 0x03b6d2e4},
 	{0x00016048, 0x8e481266, 0x8e481266, 0x8e481266, 0x8e481266},
 	{0x00016444, 0x03b6d2e4, 0x03b6d2e4, 0x03b6d2e4, 0x03b6d2e4},
 	{0x00016448, 0x8e481266, 0x8e481266, 0x8e481266, 0x8e481266},
 };
-static const u32 ar9340Modes_ub124_tx_gain_table_1p0[][5] = {
+static __unused const u32 ar9340Modes_ub124_tx_gain_table_1p0[][5] = {
 	/*  Addr      5G_HT20      5G_HT40     2G_HT40    2G_HT20  */
 	{0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
 	{0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
 	{0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
 	{0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
 	{0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
 	{0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
 	{0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
@@ -674,25 +674,25 @@ static const u32 ar9340Modes_ub124_tx_gain_table_1p0[][5] = {
 	{0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
 	{0x00016044, 0x036db2db, 0x036db2db, 0x036db2db, 0x036db2db},
 	{0x00016048, 0x69b65266, 0x69b65266, 0x69b65266, 0x69b65266},
 	{0x00016444, 0x036db2db, 0x036db2db, 0x036db2db, 0x036db2db},
 	{0x00016448, 0x69b65266, 0x69b65266, 0x69b65266, 0x69b65266},
 };
 
 
-static const u32 ar9340Common_rx_gain_table_1p0[][2] = {
+static __unused const u32 ar9340Common_rx_gain_table_1p0[][2] = {
 	/*   Addr     allmodes */
 	{0x0000a000, 0x00010000},
 	{0x0000a004, 0x00030002},
 	{0x0000a008, 0x00050004},
 	{0x0000a00c, 0x00810080},
 	{0x0000a010, 0x00830082},
 	{0x0000a014, 0x01810180},
 	{0x0000a018, 0x01830182},
 	{0x0000a01c, 0x01850184},
 	{0x0000a020, 0x01890188},
 	{0x0000a024, 0x018b018a},
 	{0x0000a028, 0x018d018c},
@@ -934,25 +934,25 @@ static const u32 ar9340Common_rx_gain_table_1p0[][2] = {
 	{0x0000b1d8, 0x00000000},
 	{0x0000b1dc, 0x00000000},
 	{0x0000b1e0, 0x00000000},
 	{0x0000b1e4, 0x00000000},
 	{0x0000b1e8, 0x00000000},
 	{0x0000b1ec, 0x00000000},
 	{0x0000b1f0, 0x00000396},
 	{0x0000b1f4, 0x00000396},
 	{0x0000b1f8, 0x00000396},
 	{0x0000b1fc, 0x00000196},
 };
 
-static const u32 ar9340Modes_low_ob_db_tx_gain_table_1p0[][5] = {
+static __unused const u32 ar9340Modes_low_ob_db_tx_gain_table_1p0[][5] = {
 	/*  Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20  */
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
 	{0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
 	{0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
 	{0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
 	{0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
@@ -1007,25 +1007,25 @@ static const u32 ar9340Modes_low_ob_db_tx_gain_table_1p0[][5] = {
 	{0x0000a5e8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5ec, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5f0, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5f4, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5f8, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x0000a5fc, 0x778a308c, 0x778a308c, 0x5d801eec, 0x5d801eec},
 	{0x00016044, 0x056db2db, 0x056db2db, 0x056db2db, 0x056db2db},
 	{0x00016048, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
 	{0x00016444, 0x056db2db, 0x056db2db, 0x056db2db, 0x056db2db},
 	{0x00016448, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
 };
 
-static const u32 ar9340Modes_mixed_ob_db_tx_gain_table_1p0[][5] = {
+static __unused const u32 ar9340Modes_mixed_ob_db_tx_gain_table_1p0[][5] = {
 	/*  Addr       5G_HT20     5G_HT40     2G_HT40    2G_HT20  */
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
 	{0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
 	{0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
 	{0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
 	{0x0000a518, 0x21020220, 0x21020220, 0x15000402, 0x15000402},
 	{0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
 	{0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603},
 	{0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02},
@@ -1080,25 +1080,25 @@ static const u32 ar9340Modes_mixed_ob_db_tx_gain_table_1p0[][5] = {
 	{0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 	{0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 	{0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 	{0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 	{0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 	{0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 	{0x00016044, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
 	{0x00016048, 0x24927266, 0x24927266, 0x8e483266, 0x8e483266},
 	{0x00016444, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
 	{0x00016448, 0x24927266, 0x24927266, 0x8e482266, 0x8e482266},
 };
 
-static const u32 ar9340_1p0_mac_core[][2] = {
+static __unused const u32 ar9340_1p0_mac_core[][2] = {
 	/*    Addr        allmodes        */
 	{0x00000008, 0x00000000},
 	{0x00000030, 0x00020085},
 	{0x00000034, 0x00000005},
 	{0x00000040, 0x00000000},
 	{0x00000044, 0x00000000},
 	{0x00000048, 0x00000008},
 	{0x0000004c, 0x00000010},
 	{0x00000050, 0x00000000},
 	{0x00001040, 0x002ffc0f},
 	{0x00001044, 0x002ffc0f},
 	{0x00001048, 0x002ffc0f},
@@ -1244,25 +1244,25 @@ static const u32 ar9340_1p0_mac_core[][2] = {
 	{0x000083ac, 0x33332210},
 	{0x000083b0, 0x33332210},
 	{0x000083b4, 0x33332210},
 	{0x000083b8, 0x33332210},
 	{0x000083bc, 0x00000000},
 	{0x000083c0, 0x00000000},
 	{0x000083c4, 0x00000000},
 	{0x000083c8, 0x00000000},
 	{0x000083cc, 0x00000200},
 	{0x000083d0, 0x000301ff},
 };
 
-static const u32 ar9340Common_wo_xlna_rx_gain_table_1p0[][2] = {
+static __unused const u32 ar9340Common_wo_xlna_rx_gain_table_1p0[][2] = {
 	/*    Addr        allmodes        */
 	{0x0000a000, 0x00010000},
 	{0x0000a004, 0x00030002},
 	{0x0000a008, 0x00050004},
 	{0x0000a00c, 0x00810080},
 	{0x0000a010, 0x00830082},
 	{0x0000a014, 0x01810180},
 	{0x0000a018, 0x01830182},
 	{0x0000a01c, 0x01850184},
 	{0x0000a020, 0x01890188},
 	{0x0000a024, 0x018b018a},
 	{0x0000a028, 0x018d018c},
@@ -1504,22 +1504,22 @@ static const u32 ar9340Common_wo_xlna_rx_gain_table_1p0[][2] = {
 	{0x0000b1d8, 0x00000000},
 	{0x0000b1dc, 0x00000000},
 	{0x0000b1e0, 0x00000000},
 	{0x0000b1e4, 0x00000000},
 	{0x0000b1e8, 0x00000000},
 	{0x0000b1ec, 0x00000000},
 	{0x0000b1f0, 0x00000396},
 	{0x0000b1f4, 0x00000396},
 	{0x0000b1f8, 0x00000396},
 	{0x0000b1fc, 0x00000196},
 };
 
-static const u32 ar9340_1p0_soc_preamble[][2] = {
+static __unused const u32 ar9340_1p0_soc_preamble[][2] = {
 	/*    Addr        allmodes        */
 	{0x000040a4, 0x00a0c1c9},
 	{0x00007008, 0x00000000},
 	{0x00007020, 0x00000000},
 	{0x00007034, 0x00000002},
 	{0x00007038, 0x000004c2},
 };
 
 #endif
--- a/src/drivers/net/ath/ath9k/ar9485_initvals.h
+++ b/src/drivers/net/ath/ath9k/ar9485_initvals.h
@@ -8,25 +8,25 @@
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
 #ifndef INITVALS_9485_H
 #define INITVALS_9485_H
 
-static const u32 ar9485_1_1_mac_core[][2] = {
+static __unused const u32 ar9485_1_1_mac_core[][2] = {
 	/*  Addr       allmodes */
 	{0x00000008, 0x00000000},
 	{0x00000030, 0x00020085},
 	{0x00000034, 0x00000005},
 	{0x00000040, 0x00000000},
 	{0x00000044, 0x00000000},
 	{0x00000048, 0x00000008},
 	{0x0000004c, 0x00000010},
 	{0x00000050, 0x00000000},
 	{0x00001040, 0x002ffc0f},
 	{0x00001044, 0x002ffc0f},
 	{0x00001048, 0x002ffc0f},
@@ -170,25 +170,25 @@ static const u32 ar9485_1_1_mac_core[][2] = {
 	{0x000083ac, 0x33332210},
 	{0x000083b0, 0x33332210},
 	{0x000083b4, 0x33332210},
 	{0x000083b8, 0x33332210},
 	{0x000083bc, 0x00000000},
 	{0x000083c0, 0x00000000},
 	{0x000083c4, 0x00000000},
 	{0x000083c8, 0x00000000},
 	{0x000083cc, 0x00000200},
 	{0x000083d0, 0x000301ff},
 };
 
-static const u32 ar9485_1_1_baseband_core[][2] = {
+static __unused const u32 ar9485_1_1_baseband_core[][2] = {
 	/* Addr       allmodes */
 	{0x00009800, 0xafe68e30},
 	{0x00009804, 0xfd14e000},
 	{0x00009808, 0x9c0a8f6b},
 	{0x0000980c, 0x04800000},
 	{0x00009814, 0x9280c00a},
 	{0x00009818, 0x00000000},
 	{0x0000981c, 0x00020028},
 	{0x00009834, 0x5f3ca3de},
 	{0x00009838, 0x0108ecff},
 	{0x0000983c, 0x14750600},
 	{0x00009880, 0x201fff00},
@@ -307,33 +307,33 @@ static const u32 ar9485_1_1_baseband_core[][2] = {
 	{0x0000a774, 0x35343332},
 	{0x0000a778, 0x00000036},
 	{0x0000a780, 0x00000838},
 	{0x0000a7c0, 0x00000000},
 	{0x0000a7c4, 0xfffffffc},
 	{0x0000a7c8, 0x00000000},
 	{0x0000a7cc, 0x00000000},
 	{0x0000a7d0, 0x00000000},
 	{0x0000a7d4, 0x00000004},
 	{0x0000a7dc, 0x00000000},
 };
 
-static const u32 ar9485Common_1_1[][2] = {
+static __unused const u32 ar9485Common_1_1[][2] = {
 	/*  Addr      allmodes */
 	{0x00007010, 0x00000022},
 	{0x00007020, 0x00000000},
 	{0x00007034, 0x00000002},
 	{0x00007038, 0x000004c2},
 };
 
-static const u32 ar9485_1_1_baseband_postamble[][5] = {
+static __unused const u32 ar9485_1_1_baseband_postamble[][5] = {
 	/* Addr       5G_HT20        5G_HT40       2G_HT40       2G_HT20 */
 	{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
 	{0x00009820, 0x206a002e, 0x206a002e, 0x206a002e, 0x206a002e},
 	{0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
 	{0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
 	{0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
 	{0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},
 	{0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},
 	{0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
 	{0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
 	{0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
 	{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec80d2e, 0x7ec80d2e},
@@ -360,25 +360,25 @@ static const u32 ar9485_1_1_baseband_postamble[][5] = {
 	{0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
 	{0x0000a284, 0x00000000, 0x00000000, 0x000002a0, 0x000002a0},
 	{0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
 	{0x0000a2d0, 0x00071981, 0x00071981, 0x00071982, 0x00071982},
 	{0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
 	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000be04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
 	{0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 };
 
-static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
+static __unused const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
 	/* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
 	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
 	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
 	{0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
 	{0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
 	{0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
 	{0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
 	{0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
@@ -433,25 +433,25 @@ static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
 	{0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
 	{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
 };
 
-static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
+static __unused const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
 	/* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20  */
 	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
 	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
 	{0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
 	{0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
 	{0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
 	{0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
 	{0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
@@ -506,46 +506,46 @@ static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
 	{0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
 	{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
 };
 
-static const u32 ar9485_1_1_radio_postamble[][2] = {
+static __unused const u32 ar9485_1_1_radio_postamble[][2] = {
 	/* Addr        allmodes */
 	{0x0001609c, 0x0b283f31},
 	{0x000160ac, 0x24611800},
 	{0x000160b0, 0x03284f3e},
 	{0x0001610c, 0x00170000},
 	{0x00016140, 0x10804008},
 };
 
-static const u32 ar9485_1_1_mac_postamble[][5] = {
+static __unused const u32 ar9485_1_1_mac_postamble[][5] = {
 	/* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
 	{0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
 	{0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
 	{0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
 	{0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
 	{0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
 	{0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
 };
 
-static const u32 ar9485_1_1_radio_core[][2] = {
+static __unused const u32 ar9485_1_1_radio_core[][2] = {
 	/* Addr        allmodes */
 	{0x00016000, 0x36db6db6},
 	{0x00016004, 0x6db6db40},
 	{0x00016008, 0x73800000},
 	{0x0001600c, 0x00000000},
 	{0x00016040, 0x7f80fff8},
 	{0x0001604c, 0x000f0278},
 	{0x00016050, 0x4db6db8c},
 	{0x00016054, 0x6db60000},
 	{0x00016080, 0x00080000},
 	{0x00016084, 0x0e48048c},
 	{0x00016088, 0x14214514},
@@ -592,32 +592,32 @@ static const u32 ar9485_1_1_radio_core[][2] = {
 	{0x000163b8, 0x00000000},
 	{0x000163bc, 0x00000000},
 	{0x000163c0, 0x000000a0},
 	{0x000163c4, 0x000c0000},
 	{0x000163c8, 0x14021402},
 	{0x000163cc, 0x00001402},
 	{0x000163d0, 0x00000000},
 	{0x000163d4, 0x00000000},
 	{0x00016c40, 0x13188278},
 	{0x00016c44, 0x12000000},
 };
 
-static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
+static __unused const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
 	/* Addr        allmodes */
 	{0x00018c00, 0x10052e5e},
 	{0x00018c04, 0x000801d8},
 	{0x00018c08, 0x0000080c},
 };
 
-static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
+static __unused const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
 	/* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
 	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
 	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
 	{0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
 	{0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
 	{0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
 	{0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
 	{0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
@@ -672,45 +672,45 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
 	{0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
 	{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
 };
 
-static const u32 ar9485_1_1[][2] = {
+static __unused const u32 ar9485_1_1[][2] = {
 	/* Addr        allmodes */
 	{0x0000a580, 0x00000000},
 	{0x0000a584, 0x00000000},
 	{0x0000a588, 0x00000000},
 	{0x0000a58c, 0x00000000},
 	{0x0000a590, 0x00000000},
 	{0x0000a594, 0x00000000},
 	{0x0000a598, 0x00000000},
 	{0x0000a59c, 0x00000000},
 	{0x0000a5a0, 0x00000000},
 	{0x0000a5a4, 0x00000000},
 	{0x0000a5a8, 0x00000000},
 	{0x0000a5ac, 0x00000000},
 	{0x0000a5b0, 0x00000000},
 	{0x0000a5b4, 0x00000000},
 	{0x0000a5b8, 0x00000000},
 	{0x0000a5bc, 0x00000000},
 };
 
-static const u32 ar9485_modes_green_ob_db_tx_gain_1_1[][5] = {
+static __unused const u32 ar9485_modes_green_ob_db_tx_gain_1_1[][5] = {
 	/* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20 */
 	{0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
 	{0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
 	{0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
 	{0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
 	{0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
 	{0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
 	{0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
 	{0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
 	{0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
 	{0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
@@ -765,51 +765,51 @@ static const u32 ar9485_modes_green_ob_db_tx_gain_1_1[][5] = {
 	{0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
 	{0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
 	{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
 };
 
-static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
+static __unused const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
 	/* Addr        allmodes */
 	{0x00018c00, 0x10013e5e},
 	{0x00018c04, 0x000801d8},
 	{0x00018c08, 0x0000080c},
 };
 
-static const u32 ar9485_1_1_soc_preamble[][2] = {
+static __unused const u32 ar9485_1_1_soc_preamble[][2] = {
 	/* Addr        allmodes */
 	{0x00004014, 0xba280400},
 	{0x00004090, 0x00aa10aa},
 	{0x000040a4, 0x00a0c9c9},
 	{0x00007010, 0x00000022},
 	{0x00007020, 0x00000000},
 	{0x00007034, 0x00000002},
 	{0x00007038, 0x000004c2},
 	{0x00007048, 0x00000002},
 };
 
-static const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2] = {
+static __unused const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2] = {
 	/* Addr        allmodes */
 	{0x0000a398, 0x00000000},
 	{0x0000a39c, 0x6f7f0301},
 	{0x0000a3a0, 0xca9228ee},
 };
 
-static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
+static __unused const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
 	/* Addr        5G_HT20       5G_HT40       2G_HT40       2G_HT20  */
 	{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
 	{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
 	{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
 	{0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
 	{0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
 	{0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
 	{0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
 	{0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
 	{0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
 	{0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
@@ -864,39 +864,39 @@ static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
 	{0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 	{0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
 	{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
 };
 
-static const u32 ar9485_fast_clock_1_1_baseband_postamble[][3] = {
+static __unused const u32 ar9485_fast_clock_1_1_baseband_postamble[][3] = {
 	/* Addr        5G_HT2        5G_HT40  */
 	{0x00009e00, 0x03721821, 0x03721821},
 	{0x0000a230, 0x0000400b, 0x00004016},
 	{0x0000a254, 0x00000898, 0x00001130},
 };
 
-static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
+static __unused const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
 	/* Addr        allmodes  */
 	{0x00018c00, 0x10012e5e},
 	{0x00018c04, 0x000801d8},
 	{0x00018c08, 0x0000080c},
 };
 
-static const u32 ar9485_common_rx_gain_1_1[][2] = {
+static __unused const u32 ar9485_common_rx_gain_1_1[][2] = {
 	/* Addr        allmodes */
 	{0x0000a000, 0x00010000},
 	{0x0000a004, 0x00030002},
 	{0x0000a008, 0x00050004},
 	{0x0000a00c, 0x00810080},
 	{0x0000a010, 0x01800082},
 	{0x0000a014, 0x01820181},
 	{0x0000a018, 0x01840183},
 	{0x0000a01c, 0x01880185},
 	{0x0000a020, 0x018a0189},
 	{0x0000a024, 0x02850284},
 	{0x0000a028, 0x02890288},
@@ -1010,32 +1010,32 @@ static const u32 ar9485_common_rx_gain_1_1[][2] = {
 	{0x0000a1d8, 0x00000000},
 	{0x0000a1dc, 0x00000000},
 	{0x0000a1e0, 0x00000000},
 	{0x0000a1e4, 0x00000000},
 	{0x0000a1e8, 0x00000000},
 	{0x0000a1ec, 0x00000000},
 	{0x0000a1f0, 0x00000396},
 	{0x0000a1f4, 0x00000396},
 	{0x0000a1f8, 0x00000396},
 	{0x0000a1fc, 0x00000296},
 };
 
-static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
+static __unused const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
 	/* Addr        allmodes */
 	{0x00018c00, 0x10053e5e},
 	{0x00018c04, 0x000801d8},
 	{0x00018c08, 0x0000080c},
 };
 
-static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
+static __unused const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
 	/* Addr        allmodes */
 	{0x0000a000, 0x00060005},
 	{0x0000a004, 0x00810080},
 	{0x0000a008, 0x00830082},
 	{0x0000a00c, 0x00850084},
 	{0x0000a010, 0x01820181},
 	{0x0000a014, 0x01840183},
 	{0x0000a018, 0x01880185},
 	{0x0000a01c, 0x018a0189},
 	{0x0000a020, 0x02850284},
 	{0x0000a024, 0x02890288},
 	{0x0000a028, 0x028b028a},
--- a/src/drivers/net/ath/ath9k/ath9k_init.c
+++ b/src/drivers/net/ath/ath9k/ath9k_init.c
@@ -11,24 +11,25 @@
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
 #include <ipxe/malloc.h>
 #include <ipxe/pci_io.h>
 #include <ipxe/pci.h>
+#include <ipxe/ethernet.h>
 
 #include "ath9k.h"
 
 int is_ath9k_unloaded;
 /* We use the hw_value as an index into our private channel structure */
 
 #define CHAN2G(_freq, _idx)  { \
 	.band = NET80211_BAND_2GHZ, \
 	.center_freq = (_freq), \
 	.hw_value = (_idx), \
 	.maxpower = 20, \
 }
@@ -338,25 +339,25 @@ static void ath9k_init_misc(struct ath_softc *sc)
 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 
 	common->ani.timer = 0;
 
 	sc->config.txpowlimit = ATH_TXPOWER_MAX;
 
 	common->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
 	common->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
 
 	ath9k_hw_set_diversity(sc->sc_ah, 1);
 	sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah);
 
-	memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
+	memcpy(common->bssidmask, eth_broadcast, ETH_ALEN);
 }
 
 static int ath9k_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
 			    const struct ath_bus_ops *bus_ops)
 {
 	struct ath_hw *ah = NULL;
 	struct ath_common *common;
 	int ret = 0, i;
 	int csz = 0;
 
 	ah = zalloc(sizeof(struct ath_hw));
 	if (!ah)

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File ipxe.63037bdce4a325e5e1da85ffcdf27b77ac670c01.patch of Package xen (Revision 9c19b2ac2b72c8989bd52e3b7b9c28ae)

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