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home:owinebar:Staging:gcc11-bootstrap
gcc11
generate_cross_specs_11
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File generate_cross_specs_11 of Package gcc11
# We now support "proper" cross-compilers to suse targets via a # cross-glibc package, enable that via for example # # add_cross cross-aarch64-gcc$base_ver aarch64 aarch64-suse-linux # # For now keep the old way of doing things if test "$do_crosses" = 1 ; then add_glibc_cross cross-aarch64-gcc$base_ver aarch64 aarch64-suse-linux add_glibc_cross cross-riscv64-gcc$base_ver riscv64 riscv64-suse-linux add_newlib_cross cross-arm-none-gcc$base_ver arm-none arm-none-eabi add_newlib_cross cross-epiphany-gcc$base_ver epiphany epiphany-elf #add_newlib_cross cross-nds32le-gcc$base_ver nds32le nds32le-elf add_newlib_cross cross-riscv64-elf-gcc$base_ver riscv64 riscv64-elf #add_newlib_cross cross-rl78-gcc$base_ver rl78 rl78-elf add_newlib_cross cross-rx-gcc$base_ver rx rx-elf if test "$do_bootstrap_crosses" = 1 ; then add_cross cross-avr-gcc$base_ver-bootstrap avr avr "%define gcc_libc_bootstrap 1" fi if test "$do_full_crosses" = 1 ; then add_cross cross-arm-gcc$base_ver arm arm-suse-linux-gnueabi %define gcc_icecream 1 add_cross cross-avr-gcc$base_ver avr avr add_cross cross-x86_64-gcc$base_ver x86_64 x86_64-suse-linux %define gcc_icecream 1 add_cross cross-s390x-gcc$base_ver s390x s390x-suse-linux %define gcc_icecream 1 add_cross cross-sparc-gcc$base_ver sparcv9 sparc-suse-linux %define gcc_icecream 1 add_cross cross-sparc64-gcc$base_ver sparc64 sparc64-suse-linux %define gcc_icecream 1 add_cross cross-ppc64-gcc$base_ver ppc64 powerpc64-suse-linux %define gcc_icecream 1 add_cross cross-ppc64le-gcc$base_ver ppc64le powerpc64le-suse-linux %define gcc_icecream 1 add_cross cross-m68k-gcc$base_ver m68k m68k-suse-linux %define gcc_icecream 1 add_cross cross-mips-gcc$base_ver mips mips-suse-linux %define gcc_icecream 1 add_cross cross-hppa-gcc$base_ver hppa hppa-suse-linux %define gcc_icecream 1 fi fi # the nvptx and amdgcn crosses are used for offloading if test "$do_full_crosses" = 1 ; then add_cross cross-nvptx-gcc$base_ver nvptx nvptx-none %define gcc_accel 1 add_cross cross-amdgcn-gcc$base_ver amdgcn amdgcn-amdhsa %define gcc_accel 1 fi
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