File 0016-enable-uart4.patch of Package imx93-devicetree
From edd69adb09aeab5f00c0711fe9092a99b247d713 Mon Sep 17 00:00:00 2001
From: Michael van der Raad <vanderraad@inventeers>
Date: Fri, 19 Sep 2025 09:06:59 +0000
Subject: [PATCH 1/2] Enable uart6
---
.../boot/dts/freescale/imx93-11x11-frdm.dts | 40 +++++++++----------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
index a938bff3f9b4..a31aa5dd59fd 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
@@ -471,14 +471,16 @@ typec1_con: connector {
};
};
-&lpuart1 {
+/*&lpuart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
- bluetooth {
- compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";
- shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
- };
+};*/
+
+&lpuart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart6>;
+ status = "okay";
};
&lpuart2 { /* console */
@@ -487,7 +489,7 @@ &lpuart2 { /* console */
status = "okay";
};
-/*&lpuart8 {
+&lpuart8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart8>;
status = "okay";
@@ -496,7 +498,7 @@ bluetooth {
compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";
shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
};
-};*/
+};
&usbotg1 {
dr_mode = "otg";
@@ -715,15 +717,6 @@ MX93_PAD_UART2_TXD__LPUART2_TX 0x31e
>;
};
- pinctrl_uart5: uart5grp {
- fsl,pins = <
- MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX 0x31e
- MX93_PAD_DAP_TDI__LPUART5_RX 0x31e
- MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x31e
- MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B 0x31e
- >;
- };
-
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
@@ -914,7 +907,7 @@ MX93_PAD_GPIO_IO11__LPSPI3_SCK 0x3fe
>;
};
- pinctrl_lpspi7: lpspi7grp { /*!< Function assigned for the core: Cortex-A55[ca55] */
+ /*pinctrl_lpspi7: lpspi7grp {
fsl,pins = <
MX93_PAD_GPIO_IO01__GPIO2_IO01 0x0000111E
MX93_PAD_GPIO_IO04__LPSPI7_PCS0 0x0000031E
@@ -925,7 +918,7 @@ MX93_PAD_GPIO_IO25__LPSPI7_PCS1 0x0000031E
MX93_PAD_SAI1_RXD0__GPIO1_IO14 0x0000111E
MX93_PAD_SAI1_TXC__GPIO1_IO12 0x0000011E
>;
- };
+ };*/
pinctrl_uart1: uart1grp {
fsl,pins = <
@@ -934,6 +927,13 @@ MX93_PAD_UART1_TXD__LPUART1_TX 0x0000031E
>;
};
+ pinctrl_uart6: uart6grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO04__LPUART6_TX 0x0000031E
+ MX93_PAD_GPIO_IO05__LPUART6_RX 0x0000011E
+ >;
+ };
+
/*pinctrl_uart8: uart8grp {
fsl,pins = <
MX93_PAD_GPIO_IO12__LPUART8_TX 0x0000031E
@@ -978,7 +978,7 @@ spi_rf: spi@0 {
};
};
-&lpspi7 {
+/*&lpspi7 {
fsl,spi-num-chipselects = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi7>;
@@ -997,7 +997,7 @@ spi_wifi_bl: spi@1 {
compatible = "lwn,bk4";
spi-max-frequency = <1000000>;
};
-};
+};*/
/*&gpio1 {
bt-wifi-enable-hog {
--
2.50.1
From 33ec6f053c9f04f7a6a3d8e71b8adf4ffed76329 Mon Sep 17 00:00:00 2001
From: Michael van der Raad <vanderraad@inventeers>
Date: Fri, 19 Sep 2025 09:11:43 +0000
Subject: [PATCH 2/2] Disable uart8
---
arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
index a31aa5dd59fd..47680cce1cd7 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
@@ -489,7 +489,7 @@ &lpuart2 { /* console */
status = "okay";
};
-&lpuart8 {
+/*&lpuart8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart8>;
status = "okay";
@@ -498,7 +498,7 @@ bluetooth {
compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";
shutdown-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
};
-};
+};*/
&usbotg1 {
dr_mode = "otg";
--
2.50.1
