File dsmr6.patch of Package imx93-devicetree
From 6b531c0142a852b6cbfad2cf5b647e23a8d571b6 Mon Sep 17 00:00:00 2001
From: Michael van der Raad <vanderraad@inventeers>
Date: Tue, 16 Sep 2025 10:40:59 +0000
Subject: [PATCH] Add devicetree with spi3, spi7 and bt-wifi enable
---
.../boot/dts/freescale/imx93-11x11-frdm.dts | 70 ++++++++++++++-----
1 file changed, 53 insertions(+), 17 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
index 068026c73017..dfae322ef388 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts
@@ -18,7 +18,7 @@ aliases {
};
chosen {
- stdout-path = &lpuart1;
+ stdout-path = &lpuart2;
};
reserved-memory {
@@ -471,9 +471,9 @@ typec1_con: connector {
};
};
-&lpuart1 { /* console */
+&lpuart2 { /* console */
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
@@ -581,12 +581,6 @@ &wdog3 {
status = "okay";
};
-&tpm3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_led1>;
- status = "okay";
-};
-
&tpm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led2>;
@@ -711,10 +705,10 @@ MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
>;
};
- pinctrl_uart1: uart1grp {
+ pinctrl_uart2: uart2grp {
fsl,pins = <
- MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
- MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
+ MX93_PAD_UART2_RXD__LPUART2_RX 0x31e
+ MX93_PAD_UART2_TXD__LPUART2_TX 0x31e
>;
};
@@ -916,12 +910,24 @@ MX93_PAD_GPIO_IO10__LPSPI3_SOUT 0x3fe
MX93_PAD_GPIO_IO11__LPSPI3_SCK 0x3fe
>;
};
- pinctrl_led1: ledsgrp1 {
+
+ pinctrl_lpspi7: lpspi7grp { /*!< Function assigned for the core: Cortex-A55[ca55] */
fsl,pins = <
- MX93_PAD_GPIO_IO04__TPM3_CH0 0x02
- MX93_PAD_GPIO_IO12__TPM3_CH2 0x02
+ MX93_PAD_GPIO_IO01__GPIO2_IO01 0x0000111E
+ MX93_PAD_GPIO_IO04__LPSPI7_PCS0 0x0000031E
+ MX93_PAD_GPIO_IO05__LPSPI7_SIN 0x0000011E
+ MX93_PAD_GPIO_IO06__LPSPI7_SOUT 0x0000011E
+ MX93_PAD_GPIO_IO07__LPSPI7_SCK 0x0000051E
+ /*
+ MX93_PAD_GPIO_IO12__LPUART8_TX 0x0000011E
+ MX93_PAD_GPIO_IO13__LPUART8_RX 0x0000011E
+ */
+ MX93_PAD_GPIO_IO25__LPSPI7_PCS1 0x0000031E
+ MX93_PAD_SAI1_RXD0__GPIO1_IO14 0x0000111E
+ MX93_PAD_SAI1_TXC__GPIO1_IO12 0x0000011E
>;
};
+
pinctrl_led2: ledsgrp2 {
fsl,pins = <
MX93_PAD_GPIO_IO13__TPM4_CH2 0x02
@@ -956,16 +962,46 @@ &lpspi3 {
pinctrl-0 = <&pinctrl_lpspi3>;
pinctrl-1 = <&pinctrl_lpspi3>;
cs-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
- pinctrl-assert-gpios = <&pcal6408 0 GPIO_ACTIVE_HIGH>;
status = "okay";
- spidev0: spi@0 {
+ spi_rf: spi@0 {
+ reg = <0>;
+ compatible = "lwn,bk4";
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&lpspi7 {
+ fsl,spi-num-chipselects = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpspi7>;
+ cs-gpios = <&gpio2 4 GPIO_ACTIVE_LOW
+ &gpio2 25 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ spi_psu: spi@0 {
reg = <0>;
compatible = "lwn,bk4";
spi-max-frequency = <1000000>;
};
+
+ spi_wifi_bl: spi@1 {
+ reg = <1>;
+ compatible = "lwn,bk4";
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&gpio1 {
+ bt-wifi-enable-hog {
+ gpio-hog;
+ gpios = <12 GPIO_ACTIVE_LOW>; // Pin 12, active low
+ output-high; // Set output to high
+ line-name = "bt-wifi-en"; // Optional label
+ };
};
&ele_if0 {
memory-region = <&ele_reserved>;
};
+
--
2.50.1
