File PKGBUILD of Package verilator

pkgname=verilator
pkgver_base=4.106
pkgver=${pkgver_base}_c4m
pkgrel=1
pkgdesc='Verilator full end-to-end digital synthesis flow for ASIC designs'
arch=('i686' 'x86_64')
url="https://github.com/RTimothyEdwards/verilator"
license=('LGPLv3' 'Artistic 2.0')
groups=('chips4makers')
depends=('perl')
makedepends=('flex' 'bison')
source=(${pkgname}-${pkgver_base}.tar.gz)
md5sums=('SKIP')

build() {
  msg "Building ${pkgname} ..."
  cd "${srcdir}"/${pkgname}-${pkgver_base}
  ./configure --prefix=/usr \
    --disable-ccwarn \
    --enable-defenv \
    --disable-longtests
  make
}

package() {
  msg "Installing ${pkgname} ..."
  cd "${srcdir}"/${pkgname}-${pkgver_base}
  make install DESTDIR="${pkgdir}"
  rm -fr ${pkgdir}/usr/share/verilator/src ${pkgdir}/usr/bin/verilator_includer
}