File djvulibre-3.5.23-gcc46.patch of Package djvulibre

--- djvulibre-3.5.23/libdjvu/GSmartPointer.h~	2011-03-29 12:35:05.000000000 +0400
+++ djvulibre-3.5.23/libdjvu/GSmartPointer.h	2011-03-29 12:35:25.000000000 +0400
@@ -58,6 +58,9 @@
 
 #ifndef _GSMARTPOINTER_H_
 #define _GSMARTPOINTER_H_
+
+#include <cstring>
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
diff --git a/libdjvu/MMX.cpp b/libdjvu/MMX.cpp
index 528dab6..e70fdd8 100644
--- a/libdjvu/MMX.cpp
+++ b/libdjvu/MMX.cpp
@@ -167,8 +167,23 @@ MMXControl::enable_mmx()
                     : "=m" (cpuflags) :
                     : "eax","ecx","edx");
 #endif
+#if defined(MMX) && defined(__GNUC__) && defined(__x86_64__)
+  // Detection of MMX for GCC
+  __asm__ volatile (// Check that CR0:EM is clear
+                    "xorl %%edx,%%edx\n\t"
+                    "smsw %%ax\n\t"
+                    "andl $4,%%eax\n\t"
+                    "jnz 1f\n\t"
+                    // Execute CPUID
+                    "movl $1,%%eax\n\t"
+                    "cpuid\n"
+                    // Finish
+		    "1:\tmovl %%edx, %0"
+                    : "=m" (cpuflags) :
+                    : "eax","ebx","ecx","edx");
+#endif
 #if defined(MMX) && defined(_MSC_VER) && defined(_M_IX86)
-  // Detection of MMX for MSVC
+  // Detection of MMX for MSVC 32 bits
   __asm {  pushfd
            pop     ecx
            xor     edx,edx
diff --git a/libdjvu/MMX.h b/libdjvu/MMX.h
index b0af5e5..f8780af 100644
--- a/libdjvu/MMX.h
+++ b/libdjvu/MMX.h
@@ -143,17 +143,18 @@ class MMXControl
 
 #ifndef NO_MMX
 
-#if defined(__GNUC__) && defined(__i386__)
+#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
+typedef struct{ char c[8]; } MMX_t;
 #define MMXemms \
   __asm__ volatile("emms" : : : "memory" ) 
 #define MMXrr(op,src,dst) \
-  __asm__ volatile( #op " %%" #src ",%%" #dst : : : "memory") 
+  __asm__ volatile( #op " %%" #src ",%%" #dst : : : "memory" ) 
 #define MMXir(op,imm,dst) \
-  __asm__ volatile( #op " %0,%%" #dst : : "i" (imm) : "memory") 
+  __asm__ volatile( #op " %0,%%" #dst : : "i" (imm) : "memory" )
 #define MMXar(op,addr,dst) \
-  __asm__ volatile( #op " %0,%%" #dst : : "m" (*(addr)) : "memory") 
+  __asm__ volatile( #op " %0,%%" #dst : : "m" (*(MMX_t*)(addr)) : "memory" ) 
 #define MMXra(op,src,addr) \
-  __asm__ volatile( #op " %%" #src ",%0" : : "m" (*(addr)) : "memory") 
+  __asm__ volatile( #op " %%" #src ",%0" : "=m" (*(MMX_t*)(addr)) : : "memory") 
 #define MMX 1
 #endif