File z10-cost of Package gcc43
Index: gcc/config/s390/2097.md
===================================================================
--- gcc/config/s390/2097.md.orig 2009-11-20 13:51:41.000000000 +0100
+++ gcc/config/s390/2097.md 2009-11-20 13:52:38.000000000 +0100
@@ -463,29 +463,34 @@
; BFP multiplication and general instructions
-(define_insn_reservation "z10_fsimpdf" 12
+(define_insn_reservation "z10_fsimpdf" 6
(and (eq_attr "cpu" "z10")
(eq_attr "type" "fsimpdf,fmuldf"))
"z10_e1_BOTH, z10_Gate_FP")
-; Wg "z10_e1_T, z10_Gate_FP")
-(define_insn_reservation "z10_fsimpsf" 12
+; LOAD ZERO produces a hex value but we need bin. Using the stage 7
+; bypass causes an exception for format conversion which is very
+; expensive. So, make sure subsequent instructions only get the zero
+; in the normal way.
+(define_insn_reservation "z10_fhex" 12
+ (and (eq_attr "cpu" "z10")
+ (eq_attr "type" "fhex"))
+ "z10_e1_BOTH, z10_Gate_FP")
+
+(define_insn_reservation "z10_fsimpsf" 6
(and (eq_attr "cpu" "z10")
(eq_attr "type" "fsimpsf,fmulsf"))
"z10_e1_BOTH, z10_Gate_FP")
-; Wg "z10_e1_T, z10_Gate_FP")
(define_insn_reservation "z10_fmultf" 52
(and (eq_attr "cpu" "z10")
(eq_attr "type" "fmultf"))
"z10_e1_BOTH*4, z10_Gate_FP")
-; Wg "z10_e1_T*4, z10_Gate_FP")
(define_insn_reservation "z10_fsimptf" 14
(and (eq_attr "cpu" "z10")
(eq_attr "type" "fsimptf"))
"z10_e1_BOTH*2, z10_Gate_FP")
-; Wg "z10_e1_T*2, z10_Gate_FP")
; BFP division
@@ -531,12 +536,12 @@
(eq_attr "type" "floadtf"))
"z10_e1_T, z10_Gate_FP")
-(define_insn_reservation "z10_floaddf" 12
+(define_insn_reservation "z10_floaddf" 1
(and (eq_attr "cpu" "z10")
(eq_attr "type" "floaddf"))
"z10_e1_T, z10_Gate_FP")
-(define_insn_reservation "z10_floadsf" 12
+(define_insn_reservation "z10_floadsf" 1
(and (eq_attr "cpu" "z10")
(eq_attr "type" "floadsf"))
"z10_e1_T, z10_Gate_FP")
@@ -553,12 +558,12 @@
; BFP truncate
-(define_insn_reservation "z10_ftrunctf" 12
+(define_insn_reservation "z10_ftrunctf" 16
(and (eq_attr "cpu" "z10")
(eq_attr "type" "ftrunctf"))
"z10_e1_T, z10_Gate_FP")
-(define_insn_reservation "z10_ftruncdf" 16
+(define_insn_reservation "z10_ftruncdf" 12
(and (eq_attr "cpu" "z10")
(eq_attr "type" "ftruncdf"))
"z10_e1_T, z10_Gate_FP")
@@ -585,8 +590,8 @@
; BFP-related bypasses. There is no bypass for extended mode.
(define_bypass 1 "z10_fsimpdf" "z10_fstoredf")
(define_bypass 1 "z10_fsimpsf" "z10_fstoresf")
-(define_bypass 1 "z10_floaddf" "z10_fsimpdf, z10_fstoredf, z10_floaddf")
-(define_bypass 1 "z10_floadsf" "z10_fsimpsf, z10_fstoresf, z10_floadsf")
+(define_bypass 1 "z10_floaddf" "z10_fsimpdf, z10_fstoredf")
+(define_bypass 1 "z10_floadsf" "z10_fsimpsf, z10_fstoresf")
;
Index: gcc/config/s390/s390.c
===================================================================
--- gcc/config/s390/s390.c.orig 2009-11-20 13:52:37.000000000 +0100
+++ gcc/config/s390/s390.c 2009-11-20 13:52:38.000000000 +0100
@@ -205,13 +205,13 @@ struct processor_costs z10_cost =
COSTS_N_INSNS (10), /* MSGFR */
COSTS_N_INSNS (10), /* MSGR */
COSTS_N_INSNS (10), /* MSR */
- COSTS_N_INSNS (10), /* multiplication in DFmode */
+ COSTS_N_INSNS (1) , /* multiplication in DFmode */
COSTS_N_INSNS (50), /* MXBR */
COSTS_N_INSNS (120), /* SQXBR */
COSTS_N_INSNS (52), /* SQDBR */
COSTS_N_INSNS (38), /* SQEBR */
- COSTS_N_INSNS (10), /* MADBR */
- COSTS_N_INSNS (10), /* MAEBR */
+ COSTS_N_INSNS (1), /* MADBR */
+ COSTS_N_INSNS (1), /* MAEBR */
COSTS_N_INSNS (111), /* DXBR */
COSTS_N_INSNS (39), /* DDBR */
COSTS_N_INSNS (32), /* DEBR */
@@ -5290,6 +5290,7 @@ s390_agen_dep_p (rtx dep_insn, rtx insn)
A STD instruction should be scheduled earlier,
in order to use the bypass. */
+
static int
s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
{
@@ -5297,7 +5298,8 @@ s390_adjust_priority (rtx insn ATTRIBUTE
return priority;
if (s390_tune != PROCESSOR_2084_Z990
- && s390_tune != PROCESSOR_2094_Z9_109)
+ && s390_tune != PROCESSOR_2094_Z9_109
+ && s390_tune != PROCESSOR_2097_Z10)
return priority;
switch (s390_safe_attr_type (insn))
@@ -5316,6 +5318,7 @@ s390_adjust_priority (rtx insn ATTRIBUTE
return priority;
}
+
/* The number of instructions that can be issued per cycle. */
static int
Index: gcc/config/s390/s390.md
===================================================================
--- gcc/config/s390/s390.md.orig 2009-11-20 13:52:37.000000000 +0100
+++ gcc/config/s390/s390.md 2009-11-20 13:52:38.000000000 +0100
@@ -199,7 +199,7 @@
(define_attr "type" "none,integer,load,lr,la,larl,lm,stm,
cs,vs,store,sem,idiv,
imulhi,imulsi,imuldi,
- branch,jsr,fsimptf,fsimpdf,fsimpsf,
+ branch,jsr,fsimptf,fsimpdf,fsimpsf,fhex,
floadtf,floaddf,floadsf,fstoredf,fstoresf,
fmultf,fmuldf,fmulsf,fdivtf,fdivdf,fdivsf,
ftoi,fsqrttf,fsqrtdf,fsqrtsf,
@@ -1964,7 +1964,7 @@
#
#"
[(set_attr "op_type" "RRE,RRE,*,*,RSY,RSY,*,*")
- (set_attr "type" "fsimptf,fsimptf,*,*,lm,stm,*,*")])
+ (set_attr "type" "fhex,fsimptf,*,*,lm,stm,*,*")])
(define_insn "*mov<mode>_31"
[(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o")
@@ -1976,7 +1976,7 @@
#
#"
[(set_attr "op_type" "RRE,RRE,*,*")
- (set_attr "type" "fsimptf,fsimptf,*,*")])
+ (set_attr "type" "fhex,fsimptf,*,*")])
; TFmode in GPRs splitters
@@ -2084,7 +2084,7 @@
lg\t%0,%1
stg\t%1,%0"
[(set_attr "op_type" "RRE,RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY")
- (set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,floaddf,floaddf,
+ (set_attr "type" "fhex,floaddf,floaddf,floaddf,floaddf,floaddf,
fstoredf,fstoredf,lr,load,store")
(set_attr "z10prop" "*,
*,
@@ -2114,7 +2114,7 @@
lg\t%0,%1
stg\t%1,%0"
[(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
- (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>,
+ (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,store")
(set_attr "z10prop" "*,
*,
@@ -2146,7 +2146,7 @@
#
#"
[(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*")
- (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>,
+ (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")])
(define_split
@@ -2213,7 +2213,7 @@
st\t%1,%0
sty\t%1,%0"
[(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
- (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>,
+ (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,load,store,store")
(set_attr "z10prop" "*,
*,
Index: gcc/config/s390/2084.md
===================================================================
--- gcc/config/s390/2084.md.orig 2009-11-20 13:51:41.000000000 +0100
+++ gcc/config/s390/2084.md 2009-11-20 13:52:38.000000000 +0100
@@ -160,19 +160,19 @@
;; Floating point insns
;;
-(define_insn_reservation "x_fsimptf" 7
+(define_insn_reservation "x_fsimptf" 7
(and (eq_attr "cpu" "z990,z9_109")
- (eq_attr "type" "fsimptf"))
- "x_e1_t*2,x-wr-fp")
+ (eq_attr "type" "fsimptf,fhex"))
+ "x_e1_t*2,x-wr-fp")
-(define_insn_reservation "x_fsimpdf" 6
+(define_insn_reservation "x_fsimpdf" 6
(and (eq_attr "cpu" "z990,z9_109")
- (eq_attr "type" "fsimpdf,fmuldf"))
+ (eq_attr "type" "fsimpdf,fmuldf,fhex"))
"x_e1_t,x-wr-fp")
-(define_insn_reservation "x_fsimpsf" 6
+(define_insn_reservation "x_fsimpsf" 6
(and (eq_attr "cpu" "z990,z9_109")
- (eq_attr "type" "fsimpsf,fmulsf"))
+ (eq_attr "type" "fsimpsf,fmulsf,fhex"))
"x_e1_t,x-wr-fp")
