File iverilog.spec of Package iverilog
#
# spec file for package verilog
#
# Copyright (c) 2012 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
# All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed
# upon. The license for this file, and modifications and additions to the
# file, is the same license as for the pristine package itself (unless the
# license for the pristine package is not an Open Source License, in which
# case the license is the MIT License). An "Open Source License" is a
# license that conforms to the Open Source Definition (Version 1.9)
# published by the Open Source Initiative.
# Please submit bugfixes or comments via http://bugs.opensuse.org/
#
Name: iverilog
Summary: Simulation and synthesis tool for IEEE-1364
License: GPL-2.0+
Group: Productivity/Scientific/Electronics
Version: 0.9.6
Release: 0
Url: http://iverilog.icarus.com/
BuildRoot: %{_tmppath}/%{name}-%{version}-build
Source: ftp://icarus.com/pub/eda/verilog/v0.9/verilog-%{version}.tar.gz
# PATCH-FIX-UPSTREAM iverilog-0.9.6-fix-licensing-issues.patch [bnc#782970, bnc#782972]
# patch must be removed for version > 0.9.6
Patch0: iverilog-0.9.6-fix-licensing-issues.patch
BuildRequires: bison
BuildRequires: flex
BuildRequires: gcc-c++
BuildRequires: gperf
BuildRequires: readline-devel
BuildRequires: zlib-devel
%description
Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard.
%package devel
Summary: Icarus Verilog development files
Group: Development/Libraries/C and C++
Requires: %{name} = %{version}
%description devel
This package contains necessary header files for Icarus Verilog
%prep
%setup -q -n verilog-%{version}
%patch0 -p1
%build
%configure
make %{?_smp_mflags}
%install
%makeinstall
rm %{buildroot}/%{_libdir}/*.a
%check
make check
%files
%defattr(-,root,root,-)
%doc COPYING README.txt BUGS.txt QUICK_START.txt ieee1364-notes.txt mingw.txt
%doc swift.txt netlist.txt t-dll.txt vpi.txt tgt-fpga/fpga.txt
%doc cadpli/cadpli.txt xilinx-hint.txt examples
%{_mandir}/man1/*
%{_bindir}/*
%{_libdir}/ivl/
%files devel
%defattr(-,root,root)
%{_includedir}/*
%changelog