File adms.spec of Package adms

#
# spec file for package adms
#
# Copyright (c) 2014 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
# All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed
# upon. The license for this file, and modifications and additions to the
# file, is the same license as for the pristine package itself (unless the
# license for the pristine package is not an Open Source License, in which
# case the license is the MIT License). An "Open Source License" is a
# license that conforms to the Open Source Definition (Version 1.9)
# published by the Open Source Initiative.

# Please submit bugfixes or comments via http://bugs.opensuse.org/
#


Name:           adms
Version:        2.3.2
Release:        0
Summary:        An automatic device model synthesizer
License:        LGPL-2.1
Group:          Productivity/Scientific/Electronics
Url:            http://sourceforge.net/projects/mot-adms/
Source0:        http://downloads.sourceforge.net/mot-adms/%{name}-%{version}.tar.gz
# PATCH-FIX-OPENSUSE adms-no-build-time.patch -- remove build time from binary
Patch1:         adms-no-build-time.patch
BuildRequires:  bison
BuildRequires:  flex
BuildRequires:  gcc-c++
BuildRequires:  libtool
BuildRequires:  perl-GD
BuildRequires:  perl-XML-LibXML
BuildRoot:      %{_tmppath}/%{name}-%{version}-build

%description
ADMS is a code generator that converts electrical compact device models
specified in high-level description language into ready-to-compile C code
for the API of spice simulators. Based on transformations specified in XML
language, ADMS transforms Verilog-AMS code into other target languages.

%package        devel
Summary:        Development files for ADMS
Group:          Development/Libraries/Other
Requires:       libadmsAdmstpath0 = %{version}
Requires:       libadmsElement0 = %{version}
Requires:       libadmsPreprocessor0 = %{version}
Requires:       libadmsVeriloga0 = %{version}

%description    devel
ADMS is a code generator that converts electrical compact device models
specified in high-level description language into ready-to-compile C code
for the API of spice simulators. Based on transformations specified in XML
language, ADMS transforms Verilog-AMS code into other target languages.

%package     -n libadmsAdmstpath0
Summary:        ADMS Admstpath library
Group:          System/Libraries

%description -n libadmsAdmstpath0
ADMS is a code generator that converts electrical compact device models
specified in high-level description language into ready-to-compile C code
for the API of spice simulators. Based on transformations specified in XML
language, ADMS transforms Verilog-AMS code into other target languages.

%package     -n libadmsElement0
Summary:        ADMS Element library
Group:          System/Libraries

%description -n libadmsElement0
ADMS is a code generator that converts electrical compact device models
specified in high-level description language into ready-to-compile C code
for the API of spice simulators. Based on transformations specified in XML
language, ADMS transforms Verilog-AMS code into other target languages.

%package     -n libadmsPreprocessor0
Summary:        ADMS Preprocessor library
Group:          System/Libraries

%description -n libadmsPreprocessor0
ADMS is a code generator that converts electrical compact device models
specified in high-level description language into ready-to-compile C code
for the API of spice simulators. Based on transformations specified in XML
language, ADMS transforms Verilog-AMS code into other target languages.

%package     -n libadmsVeriloga0
Summary:        ADMS Verilog-AMS library
Group:          System/Libraries

%description -n libadmsVeriloga0
ADMS is a code generator that converts electrical compact device models
specified in high-level description language into ready-to-compile C code
for the API of spice simulators. Based on transformations specified in XML
language, ADMS transforms Verilog-AMS code into other target languages.

%prep
%setup -q
%patch1 -p1

%build
%configure \
    --disable-static

make %{?_smp_mflags}

%install
%make_install
find %{buildroot} -type f -name "*.la" -delete -print

%post -n libadmsVeriloga0 -p /sbin/ldconfig
%postun -n libadmsVeriloga0 -p /sbin/ldconfig

%post -n libadmsElement0 -p /sbin/ldconfig
%postun -n libadmsElement0 -p /sbin/ldconfig

%post -n libadmsAdmstpath0 -p /sbin/ldconfig
%postun -n libadmsAdmstpath0 -p /sbin/ldconfig

%post -n libadmsPreprocessor0 -p /sbin/ldconfig
%postun -n libadmsPreprocessor0 -p /sbin/ldconfig

%files
%defattr(-,root,root)
%doc AUTHORS ChangeLog COPYING
%{_bindir}/admsXml
%{_mandir}/man1/admsCheck.1.gz
%{_mandir}/man1/admsXml.1.gz

%files -n libadmsVeriloga0
%defattr(-,root,root)
%{_libdir}/libadmsVeriloga.so.0*

%files -n libadmsElement0
%defattr(-,root,root)
%{_libdir}/libadmsElement.so.0*

%files -n libadmsAdmstpath0
%defattr(-,root,root)
%{_libdir}/libadmsAdmstpath.so.0*

%files -n libadmsPreprocessor0
%defattr(-,root,root)
%{_libdir}/libadmsPreprocessor.so.0*

%files devel
%defattr(-,root,root)
%{_libdir}/*.so

%changelog
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