File isa-l.changes of Package isa-l
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Mon Mar 16 14:41:32 UTC 2026 - Pablo de Lara Guarch <pablo.de.lara.guarch@intel.com>
- v2.32.0: Update
- Added CMake build system (only verified for x86_64).
- Minimum NASM version required for x86 architecture is 2.14.01 now.
- 32-bit x86 support has been removed.
- Initial riscv64 support with runtime and build-time CPU feature detection.
- Added new RVV adler32 implementations.
- Added optimized RVV adler32 for VLEN=128.
- Added experimental ISA-L shim library to provide drop-in compatibility with zlib.
- Added new x86 AVX2+GFNI and AVX512+GFNI pq_gen implementations.
- Added new RVV xor_gen, pq_gen implementations.
- Added new RVV ec_encode_data,ec_encode_data_update,gf_vect_mad, gf_vect_dot_prod, gf_vect_mul implementations.
- Added new AVX2+GFNI implementation for gf_vect_mul.
- Added new gf_vect_mul_init_base, to be used with any erasure coding base functions, such as gf_vect_mul_base.
- Enabled GFNI implementations for gf_vect_mad.
- gf_vect_mul_init is now a multi-binary function, backed by different implementations depending on the ISA available.
- Added new RVV zero-memory detection implementations.
- Added new AVX2+VCLMUL implementations for CRC64, CRC32 and CRC16 variants.
- CRC32 ISCSI AVX512+VCLMUL optimized for small buffers.
- CRC64 Rocksoft implementation on aarch64 optimized similar to other CRC64
implementations.
- Added new RVV CRC64/32/16 implementations.
- Fixed various compilation issues/warnings for different platforms.
- Fixed documentation on xor/pq gen/check functions, with minimum
number of vectors.
- Fixed potential out-of-bounds read on Adler32 Neon implementation.
- Fixed potential out-of-bounds read on gf_vect_mul Neon implementation.
- Fixed x86 load/store instructions in erasure coding functions (aligned moves
that should be unaligned).
- Fixed memory leaks in unit tests.
- Fixed RAID performance application for MacOS.
- Fixed DEFLATE header construction for constant 0x00 and 0xFF blocks
in Big-Endian systems.
- ec_init_tables now always return a `32-byte * k * rows` array,
regardless the underlying implementation used
(in Release v2.31, it could return a `8-byte * k * rows` array
if GFNI ISA was available in the system).
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Mon Jan 13 19:44:45 UTC 2025 - Pablo de Lara Guarch <pablo.de.lara.guarch@intel.com>
- v2.31.1: Update
- Fixed return type for PowerPC _gf_vect_mul_base function.
- Fixed isal_deflate_icf_finish_lvl1 dispatcher for aarch64.
- Fixed CRC compilation on aarch64.
- Fixed MacOS-14 compilation.
- Fixed MinGW build.
- Fixed Clang compilation on igzip library on aarch64.
- Fixed Windows build on erasure code performance applications.
- Fixed compilation with YASM
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Thu Jun 6 11:41:47 UTC 2024 - Andreas Schwab <schwab@suse.de>
- Add -ffat-lto-objects
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Tue Feb 27 08:47:43 UTC 2024 - Jan Engelhardt <jengelh@inai.de>
- Let -devel subpackage use the SRPM base name.
- Use %ldconfig_scriptlets.
- Description updates: meaningful description for the SRPM, neutral
descriptions, trim duplication, give libisal2 a bulleted list.
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Mon Feb 26 17:30:24 UTC 2024 - Jeff Mahoney <jeffm@suse.com> - v2.31.0
- v2.31.0: Update
- gf_vect_mul_base() function now returns an integer, matching the return type of gf_vect_mul() function (not a breaking change).
- Added compress/decompress with dictionary to perf test app.
- Zlib header can be now created on the fly when starting the compression.
- Added isal_zlib_hdr_init() function to initialize the zlib header to 0.
- Optimized AVX implementation.
- Added new AVX2 and AVX512 implementations.
- Added new AVX512 and AVX2 implementations using GFNI instructions.
- Added new SVE implementation.
- Added new CRC64 Rocksoft algorithm.
- CRC x86 implementations optimized using ternary logic instructions and
- folding of bigger data on the last bytes.
- CRC16 T10dif aarch64 implementation improved.
- CRC aarch64 implementations optimized using XOR fusion feature.
- Changed performance tests to warm by default.
- Fixed various compilation issues/warnings for different platforms.
- Fixed documentation on xor/pq gen/check functions, with minimum
number of vectors.
- Fixed potential out-of-bounds read on Adler32 Neon implementation.
- Fixed potential out-of-bounds read on gf_vect_mul Neon implementation.
- Fixed x86 load/store instructions in erasure coding functions (aligned moves
that should be unaligned).
- Fixed memory leaks in unit tests.
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Thu Mar 23 20:22:12 UTC 2023 - Jeff Mahoney <jeffm@suse.com> - v2.30.0
- v2.30.0: Initial packaging.
