File nvl425788.patch of Package cross-ppc-gcc-icecream-backend

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File nvl425788.patch of Package cross-ppc-gcc-icecream-backend

2008-07-30  Nathan Froyd  <froydnj@codesourcery.com>

PR target/35866

* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Add clause for
       vector modes.

Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc.orig/config/rs6000/rs6000.h	2008-09-10 16:22:31.000000000 -0300
+++ gcc/config/rs6000/rs6000.h	2008-09-10 16:55:58.000000000 -0300
@@ -619,12 +619,15 @@
 /* Define this macro to be the value 1 if unaligned accesses have a cost
    many times greater than aligned accesses, for example if they are
    emulated in a trap handler.  */
+/* Altivec vector memory instructions simply ignore the low bits; SPE
+   vector memory instructions trap on unaligned accesses.  */
 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN)				\
   (STRICT_ALIGNMENT							\
    || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode	\
 	|| (MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode	\
 	|| (MODE) == DImode)						\
-       && (ALIGN) < 32))
+       && (ALIGN) < 32)							\
+   || (VECTOR_MODE_P ((MODE)) && (ALIGN) < GET_MODE_BITSIZE ((MODE))))
 
 /* Standard register usage.  */

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File nvl425788.patch of Package cross-ppc-gcc-icecream-backend

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