File kvm-qemu-ide-ich6.patch of Package kvm.853

#qemu-only -> submit upstream qemu 
Index: qemu-kvm-0.14.0.rc0/hw/irq.c
===================================================================
--- qemu-kvm-0.14.0.rc0.orig/hw/irq.c
+++ qemu-kvm-0.14.0.rc0/hw/irq.c
@@ -35,6 +35,7 @@ void qemu_set_irq(qemu_irq irq, int leve
     if (!irq)
         return;
 
+//printf("IRQ set %#hhx = %#hhd using %p\n", irq->n, level, irq->handler);
     irq->handler(irq->opaque, irq->n, level);
 }
 
Index: qemu-kvm-0.14.0.rc0/hw/ide.h
===================================================================
--- qemu-kvm-0.14.0.rc0.orig/hw/ide.h
+++ qemu-kvm-0.14.0.rc0/hw/ide.h
@@ -15,6 +15,7 @@ void pci_cmd646_ide_init(PCIBus *bus, Dr
                          int secondary_ide_enabled);
 PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
+void pci_ich6_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 void vt82c686b_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
 
 /* ide-macio.c */
Index: qemu-kvm-0.14.0.rc0/hw/ide/piix.c
===================================================================
--- qemu-kvm-0.14.0.rc0.orig/hw/ide/piix.c
+++ qemu-kvm-0.14.0.rc0/hw/ide/piix.c
@@ -167,6 +167,29 @@ static int pci_piix4_ide_initfn(PCIDevic
     return pci_piix_ide_initfn(d);
 }
 
+static int pci_ich6_ide_initfn(PCIDevice *dev)
+{
+    uint8_t *pci_conf;
+    PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);
+
+    pci_config_set_vendor_id(d->dev.config, PCI_VENDOR_ID_INTEL);
+    pci_config_set_device_id(d->dev.config, PCI_DEVICE_ID_INTEL_ICH6);
+
+    pci_conf = d->dev.config;
+
+    pci_conf[0x09] = 0x80; // legacy ATA mode
+    pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
+    pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
+    pci_conf[0x0e] = 0x00; // header_type
+
+    pci_conf[0x40] = 0;
+    pci_conf[0x41] = 0xf0; // primary port enabled
+    pci_conf[0x42] = 0;
+    pci_conf[0x43] = 0x00; // secondary port disabled
+
+    return pci_piix_ide_initfn(d);
+}
+
 /* hd_table must contain 4 block drivers */
 /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
 PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
@@ -189,6 +212,16 @@ PCIDevice *pci_piix4_ide_init(PCIBus *bu
     return dev;
 }
 
+/* hd_table must contain 4 block drivers */
+/* NOTE: for the ICH6, the IRQs and IOports are hardcoded */
+void pci_ich6_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn)
+{
+    PCIDevice *dev;
+
+    dev = pci_create_simple(bus, devfn, "ICH6 IDE");
+    pci_ide_create_devs(dev, hd_table);
+}
+
 static PCIDeviceInfo piix_ide_info[] = {
     {
         .qdev.name    = "piix3-ide",
@@ -203,6 +236,11 @@ static PCIDeviceInfo piix_ide_info[] = {
         .no_hotplug   = 1,
         .init         = pci_piix4_ide_initfn,
     },{
+        .qdev.name    = "ICH6 IDE",
+        .qdev.size    = sizeof(PCIIDEState),
+        .qdev.no_user = 1,
+        .init         = pci_ich6_ide_initfn,
+    },{
         /* end of list */
     }
 };
Index: qemu-kvm-0.14.0.rc0/hw/pci_ids.h
===================================================================
--- qemu-kvm-0.14.0.rc0.orig/hw/pci_ids.h
+++ qemu-kvm-0.14.0.rc0/hw/pci_ids.h
@@ -100,6 +100,7 @@
 #define PCI_VENDOR_ID_INTEL              0x8086
 #define PCI_DEVICE_ID_INTEL_82441        0x1237
 #define PCI_DEVICE_ID_INTEL_82801AA_5    0x2415
+#define PCI_DEVICE_ID_INTEL_ICH6         0x269e
 #define PCI_DEVICE_ID_INTEL_ESB_9        0x25ab
 #define PCI_DEVICE_ID_INTEL_82371SB_0    0x7000
 #define PCI_DEVICE_ID_INTEL_82371SB_1    0x7010