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openSUSE:Evergreen:Maintenance:114
xen.openSUSE_Evergreen_11.4
23511-AMD-Fam15-C3-no-cache-flush.patch
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File 23511-AMD-Fam15-C3-no-cache-flush.patch of Package xen.openSUSE_Evergreen_11.4
References: bnc#728999 # HG changeset patch # User Mark Langsdorf <mark.langsdorf@amd.com> # Date 1308051989 -3600 # Node ID 450f1d198e1e299b69489d513f591f0301cc5166 # Parent 864a3dd1d9b4664f1ece44c9eaf390969253b7a8 x86/amd: Eliminate cache flushing when entering C3 on select AMD processors AMD Fam15h processors have a shared cache. It does not need=20 to be be flushed when entering C3 and doing so causes reduces performance. Modify acpi_processor_power_init_bm_check to prevent these processors from flushing when entering C3. Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -551,7 +551,8 @@ static void acpi_processor_power_init_bm flags->bm_check = 0; if ( num_online_cpus() == 1 ) flags->bm_check = 1; - else if ( c->x86_vendor == X86_VENDOR_INTEL ) + else if ( (c->x86_vendor == X86_VENDOR_INTEL) || + ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 0x15)) ) { /* * Today all MP CPUs that support C3 share cache.
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