File 0048-hw-arm-virt-mark-the-PCIe-host-cont.patch of Package qemu

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File 0048-hw-arm-virt-mark-the-PCIe-host-cont.patch of Package qemu (Revision 8badbc9a67d05ae678ce530b20bd38e9)

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From 8b1a852589b2693dd384680d761e617a34ba2f9e Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Mon, 4 Jul 2016 13:06:36 +0100
Subject: [PATCH] hw/arm/virt: mark the PCIe host controller as DMA coherent in
 the DT

Since QEMU performs cacheable accesses to guest memory when doing DMA
as part of the implementation of emulated PCI devices, guest drivers
should use cacheable accesses as well when running under KVM. Since this
essentially means that emulated PCI devices are DMA coherent, set the
'dma-coherent' DT property on the PCIe host controller DT node.

This brings the DT description into line with the ACPI description,
which already marks the PCI bridge as cache coherent (see commit
bc64b96c984abf).

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 1467134090-5099-1-git-send-email-ard.biesheuvel@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 5d636e21c44ecf982a22a7bc4ca89186079ac283)
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/arm/virt.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a535285..30841de 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -950,6 +950,7 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic,
     qemu_fdt_setprop_cell(vbi->fdt, nodename, "#size-cells", 2);
     qemu_fdt_setprop_cells(vbi->fdt, nodename, "bus-range", 0,
                            nr_pcie_buses - 1);
+    qemu_fdt_setprop(vbi->fdt, nodename, "dma-coherent", NULL, 0);
 
     if (vbi->v2m_phandle) {
         qemu_fdt_setprop_cells(vbi->fdt, nodename, "msi-parent",

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File 0048-hw-arm-virt-mark-the-PCIe-host-cont.patch of Package qemu (Revision 8badbc9a67d05ae678ce530b20bd38e9)

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