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File perf-vendor-events-amd-add-itlb-instruction-fetch-hits-event-for-zen1.patch of Package perf
From: Kim Phillips <kim.phillips@amd.com> Date: Tue, 1 Sep 2020 17:09:42 -0500 Subject: perf vendor events amd: Add ITLB Instruction Fetch Hits event for zen1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Git-commit: ab22eea35f1f120c4a379aa26e5333e7e41bb303 Patch-mainline: v5.10-rc1 References: jsc#SLE-16757 The ITLB Instruction Fetch Hits event isn't documented even in later zen1 PPRs, but it seems to count correctly on zen1 hardware. Add it to zen1 group so zen1 users can use the upcoming IC Fetch Miss Ratio Metric. The IF1G, 1IF2M, IF4K (Instruction fetches to a 1 GB, 2 MB, and 4K page) unit masks are not added because unlike zen2 hardware, zen1 hardware counts all its unit masks with a 0 unit mask according to the old convention: zen1$ perf stat -e cpu/event=0x94/,cpu/event=0x94,umask=0xff/ sleep 1 Performance counter stats for 'sleep 1': 211,318 cpu/event=0x94/u 211,318 cpu/event=0x94,umask=0xff/u Rome/zen2: zen2$ perf stat -e cpu/event=0x94/,cpu/event=0x94,umask=0xff/ sleep 1 Performance counter stats for 'sleep 1': 0 cpu/event=0x94/u 190,744 cpu/event=0x94,umask=0xff/u Signed-off-by: Kim Phillips <kim.phillips@amd.com> Acked-by: Ian Rogers <irogers@google.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> # on Zen2 only (3900x) Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Borislav Petkov <bp@suse.de> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: John Garry <john.garry@huawei.com> Cc: Jon Grimm <jon.grimm@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Martin Jambor <mjambor@suse.cz> Cc: Martin Liška <mliska@suse.cz> Cc: Michael Petlan <mpetlan@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Vijay Thakkar <vijaythakkar@me.com> Cc: William Cohen <wcohen@redhat.com> Cc: Yunfeng Ye <yeyunfeng@huawei.com> Link: http://lore.kernel.org/lkml/20200901220944.277505-2-kim.phillips@amd.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Tony Jones <tonyj@suse.de> --- tools/perf/pmu-events/arch/x86/amdzen1/branch.json | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/perf/pmu-events/arch/x86/amdzen1/branch.json b/tools/perf/pmu-events/arch/x86/amdzen1/branch.json index a9943eeb8d6b..4ceb67a0db21 100644 --- a/tools/perf/pmu-events/arch/x86/amdzen1/branch.json +++ b/tools/perf/pmu-events/arch/x86/amdzen1/branch.json @@ -19,5 +19,10 @@ "EventName": "bp_de_redirect", "EventCode": "0x91", "BriefDescription": "Decoder Overrides Existing Branch Prediction (speculative)." + }, + { + "EventName": "bp_l1_tlb_fetch_hit", + "EventCode": "0x94", + "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB." } ]
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