File 2e3b220a-cpu-Add-Westmere-IBRS-CPU-model.patch of Package libvirt.9596

From 2e3b220a874e558e54678afd7cf49466fe605e09 Mon Sep 17 00:00:00 2001
From: Jiri Denemark <jdenemar@redhat.com>
Date: Mon, 8 Jan 2018 20:53:25 +0100
Subject: [PATCH 07/15] cpu: Add Westmere-IBRS CPU model

This is a variant of Westmere with indirect branch prediction
protection. The only difference between Westmere and Westmere-IBRS is
the added "spec-ctrl" feature.

The Westmere-IBRS model in QEMU is a bit different since Westmere got
several additional features since we added it in cpu_map.xml:
    arat, pclmuldq, vme

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
---
 src/cpu/cpu_map.xml | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

Index: libvirt-3.3.0/src/cpu/cpu_map.xml
===================================================================
--- libvirt-3.3.0.orig/src/cpu/cpu_map.xml
+++ libvirt-3.3.0/src/cpu/cpu_map.xml
@@ -943,6 +943,44 @@
       <feature name='tsc'/>
     </model>
 
+    <model name='Westmere-IBRS'>
+      <signature family='6' model='44'/>
+      <vendor name='Intel'/>
+      <feature name='aes'/>
+      <feature name='apic'/>
+      <feature name='clflush'/>
+      <feature name='cmov'/>
+      <feature name='cx16'/>
+      <feature name='cx8'/>
+      <feature name='de'/>
+      <feature name='fpu'/>
+      <feature name='fxsr'/>
+      <feature name='lahf_lm'/>
+      <feature name='lm'/>
+      <feature name='mca'/>
+      <feature name='mce'/>
+      <feature name='mmx'/>
+      <feature name='msr'/>
+      <feature name='mtrr'/>
+      <feature name='nx'/>
+      <feature name='pae'/>
+      <feature name='pat'/>
+      <feature name='pge'/>
+      <feature name='pni'/>
+      <feature name='popcnt'/>
+      <feature name='pse'/>
+      <feature name='pse36'/>
+      <feature name='sep'/>
+      <feature name='spec-ctrl'/>
+      <feature name='sse'/>
+      <feature name='sse2'/>
+      <feature name='sse4.1'/>
+      <feature name='sse4.2'/>
+      <feature name='ssse3'/>
+      <feature name='syscall'/>
+      <feature name='tsc'/>
+    </model>
+
     <model name='SandyBridge'>
       <signature family='6' model='42'/>
       <vendor name='Intel'/>