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openSUSE:Maintenance:7390
xen.openSUSE_Leap_42.3_Update
59aec375-x86emul-correct-VEX-L-handling-for-VCV...
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File 59aec375-x86emul-correct-VEX-L-handling-for-VCVTx2SI.patch of Package xen.openSUSE_Leap_42.3_Update
# Commit a6488965ca3ec30f2e0b7022b539bba78c2aeede # Date 2017-09-05 17:32:05 +0200 # Author Jan Beulich <jbeulich@suse.com> # Committer Jan Beulich <jbeulich@suse.com> x86emul: correct VEX.L handling for VCVT{,T}S{S,D}2SI Recent changes to the SDM (and XED) have made clear that older hardware raising #UD when the bit is set was really an erratum. Generalize the so far AMD-only override. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -5609,9 +5609,8 @@ x86_emulate( } else { - if ( ctxt->vendor == X86_VENDOR_AMD ) - vex.l = 0; - generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD); + generate_exception_if(vex.reg != 0xf, EXC_UD); + vex.l = 0; host_and_vcpu_must_have(avx); get_fpu(X86EMUL_FPU_ymm, &fic); }
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