baserev update by copy to link target

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Update patches

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- Also refresh luajit-s390x.patch from the rebased pull request.

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- Update to version 5.1.2.1.0+git.1707061634.0d313b2:
  * Rework stack overflow handling.
  * Preserve keys with dynamic values in template tables when saving bytecode.
  * Prevent include of luajit_rolling.h.
  * Fix documentation bug about '\z' string escape.
  * Fix zero stripping in %g number formatting.
  * Fix unsinking of IR_FSTORE for NULL metatable.
  * DynASM/x86: Add endbr instruction.
  * MIPS64 R2/R6: Fix FP to integer conversions.
  * Add cross-32/64 bit and deterministic bytecode generation.
  * DynASM/x86: Allow [&expr] operand.
  * Check for IR_HREF vs. IR_HREFK aliasing in non-nil store check.
  * Respect jit.off() on pending trace exit.
  * Simplify handling of instable types in TNEW/TDUP load forwarding.
  * Only emit proper parent references in snapshot replay.
  * Fix anchoring for string buffer set() method (again).
  * ARM: Fix stack restore for FP slots.
  * Document workaround for multilib vs. cross-compiler conflict.
  * Fix anchoring for string buffer set() method.
  * Fix runtime library flags for MSVC debug builds.
  * Fix .debug_abbrev section in GDB JIT API.
  * Optimize table.new() with constant args to (sinkable) IR_TNEW.
  * Emit sunk IR_NEWREF only once per key on snapshot replay.
  * Fix last commit.
  * x86/x64: Don't fuse loads across IR_NEWREF.
  * Improve last commit.
  * x86/x64: Don't fuse loads across table.clear.
  * x86/x64: Add more red zone checks to assembler backend.
  * Add stack check to pcall/xpcall.
  * Invalidate SCEV entry when returning to lower frame.

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baserev update by copy to link target

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- Adjust luajit-lua-versioned.patch to have correct LUA_LJDIR
  (bsc#1215592).

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baserev update by copy to link target

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Something has nothing to do

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Clean up the SPEC file

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- Update to version 5_1.2.1.0~beta3+git.1693350652.41fb94d:
  * Add randomized register allocation for fuzz testing.
  * ARM64: Improve register allocation for integer IR_MUL/IR_MULOV.
  * ARM64: Fix register allocation for IR_*LOAD.
  * Update external MSDN URL in code.
  * FFI/ARM64/OSX: Handle non-standard OSX C calling conventions.
  * FFI: Unify stack setup for C calls in interpreter.
  * ARM64: Prevent STP fusion for conditional code emitted by TBAR.
  * ARM64: Fix LDP/STP fusing for unaligned accesses.
  * Handle table unsinking in the presence of IRFL_TAB_NOMM.
  * Use fallback name for install files without valid .git or .relver.
  * Handle non-.git checkout with .relver in .bat-file builds.
  * Fix external C call stack check when using LUAJIT_MODE_WRAPCFUNC.
  * Fix predict_next() in parser (again).
- Update luajit-lua-versioned.patch to work with the git checkout
  created tarball. The point of the patch is to extend the
  version number so that it is always bigger than 2.2.0 version
  of moonjit, which is Obsoleted by this package.

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Enable the patch again, now with a bit of metadata.

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Get rid of the patch (WIP).

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Modernized version of the SPEC file.

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Fix the patch

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Fix the patch

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Fix the patch

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Fix the patch

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Update patch

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- Update to version 2.1.0~beta3+git.1692716794.03c3112:
  * Fix typo.
  * Handle the case when .git is not a directory.
  * Add .gitattributes to dynamically resolve .relver.
  * Add .gitattributes to dynamically resolve .relver.
  * Fix for last commit: also remove symlink on uninstall.
  * Switch to rolling releases: mark v2.1 as production.
  * Fix Windows build scripts for rolling releases.
  * Switch MSVC and console build scripts to rolling releases.
  * Switch build system to rolling releases.
  * Update documentation for switch to rolling releases.
  * Bump copyright date.
  * Remove work-in-progress notice in string buffer docs.
  * MIPS: Fix "bad FP FLOAD" assertion.
  * Ensure forward progress on trace exit to BC_ITERN.
  * ARM64: Add support for ARM64e pointer authentication codes (PAC).
  * DynASM/ARM64: Add instructions for ARM64e PAC.
  * Fix maxslots when recording BC_VARG, part 3.
  * Fix predict_next() in parser.
  * MIPS32: Declare that the assembler part uses the FR=0 model.
  * ARM64: Fix assembly of HREFK (again).
  * Fix frame for more types of on-trace error messages.
  * Add workaround for bytecode dump of builtins.
  * DynASM: Fix regression due to warning fix.
  * Fix base register coalescing in side trace.
  * ARM64: Fix assembly of HREFK.
  * Fix maxslots when recording BC_VARG, part 2.
  * Fix maxslots when recording BC_TSETM.
  * Fix maxslots when recording BC_VARG.
  * Fix register mask for stack check in head of side trace.

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baserev update by copy to link target

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