Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
- Links to electronics / iverilog
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osc -A https://api.opensuse.org checkout home:rhabacker:branches:electronics:snapshots/iverilog && cd $_ - Create Badge
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Source Files (show merged sources derived from linked package)
| Filename | Size | Changed |
|---|---|---|
|
0001-vvp-generate-libvvp-import-library-for-MinGW- |
0000001935 1.89 KB | |
| 0002-vvp-install-libvvp-pkg-config-file.patch | 0000002803 2.74 KB | |
| 0003-vvp-create-libvvp-as-versioned-library.patch | 0000002720 2.66 KB | |
| _link | 0000000119 119 Bytes | |
| _service | 0000000636 636 Bytes | |
| iverilog.changes | 0000005459 5.33 KB | |
| iverilog.spec | 0000002999 2.93 KB |
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