Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
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osc -A https://api.opensuse.org checkout openSUSE:13.1/iverilog && cd $_
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Source Files
Filename | Size | Changed |
---|---|---|
iverilog-0.9.6-fix-licensing-issues.patch | 0000055040 53.8 KB | |
iverilog.changes | 0000003168 3.09 KB | |
iverilog.spec | 0000002351 2.3 KB | |
verilog-0.9.6.tar.gz | 0001219982 1.16 MB |
Latest Revision
Adrian Schröter (adrianSuSE)
committed
(revision 1)
Split 13.1 from Factory
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