Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
- Sources inherited from project openSUSE:13.2
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Source Files
Filename | Size | Changed |
---|---|---|
iverilog.changes | 0000003411 3.33 KB | |
iverilog.spec | 0000002150 2.1 KB | |
verilog-0.9.7.tar.gz | 0001238088 1.18 MB |
Latest Revision
Adrian Schröter (adrianSuSE)
committed
(revision 1)
Split 13.2 from Factory
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