Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
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| Filename | Size | Changed |
|---|---|---|
| iverilog.changes | 0000003761 3.67 KB | |
| iverilog.spec | 0000002241 2.19 KB | |
| verilog-10.1.tar.gz | 0001685176 1.61 MB |
Latest Revision
Yuchen Lin (maxlin_factory)
accepted
request 550744
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Yuchen Lin (maxlin_factory)
(revision 1)
Automated submission of a package from openSUSE:Factory to openSUSE:Leap:15.0 that was included in openSUSE:Leap:42.3
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