# RISCV32 Baremetal ToolChain

**Project Name:** riscv32-baremetal-toolchain
**Project Title:** RISCV32 Baremetal ToolChain
**Compiler:** GCC 16.1
**Target:** RISC-V32 Baremetal (non-Unix, ELF-based)

---

## 📖 Overview

This project delivers a **complete RISC-V32 baremetal toolchain** based on **GCC 16.1**, packaged for reproducible builds on the **openSUSE Build Service (OBS)**.
It is intended for developers building firmware and embedded applications for RISC-V32 systems without an operating system.

The toolchain targets `riscv32-unknown-elf` and provides everything needed to compile, link, and debug baremetal applications for custom RISC-V hardware such as **ThejoRathna32**.

---

## 🔧 Components

- **[Binutils](ca://s?q=Explain_RISC-V_binutils)**
Assembler, linker, and utilities for RISC-V ELF targets.

- **[GCC 16.1](ca://s?q=Explain_GCC_16.1_for_RISC-V)**
Cross-compiler supporting C and C++ (including C++23) for RV32 baremetal.

- **[Newlib](ca://s?q=Explain_Newlib_for_RISC-V)**
Lightweight C standard library for embedded systems.

- **[GDB](ca://s?q=Explain_RISC-V_GDB)**
Debugger for RISC-V ELF firmware.

---

## 🎯 Features

- **ISA:** `rv32im` (integer + multiply) with optional extensions (`zicsr`, `zifencei`)
- **ABI:** `ilp32`
- **Languages:** C, C++ (with modern C++23 support)
- **Optimized for:** Embedded firmware development, deterministic builds, reproducible toolchains
- **Build system:** Packaged and distributed via OBS for openSUSE and derivatives

---

## ⚙️ Build Process (OBS)

The toolchain is built in **four stages**:

1. **Binutils**
Provides assembler (`as`), linker (`ld`), and utilities.

2. **GCC Stage 1 (Bootstrap)**
Minimal compiler to build Newlib.

3. **Newlib**
Embedded C library for baremetal targets.

4. **Final GCC**
Full compiler with C and C++ support, linked against Newlib.

5. **GDB (optional)**
Debugger for firmware development.

Each stage is packaged separately in OBS (`binutils`, `gcc-stage1`, `newlib`, `gcc-final`, `gdb`) and chained together automatically.

---

## 🚀 Installation

Once built on OBS, install via `zypper`:

```bash
sudo zypper install riscv32-unknown-elf-gcc \
riscv32-unknown-elf-binutils \
riscv32-unknown-elf-newlib \
riscv32-unknown-elf-gdb
```
---
```c
// hello.c
#include

int main(void) {
printf("Hello, RISC-V32 Baremetal!\n");
while (1);
}
```
---
Build with the toolchain:

```bash
riscv32-unknown-elf-gcc -march=rv32im -mabi=ilp32 -O2 -o hello.elf hello.c
Inspect ELF output:
```
```bash
riscv32-unknown-elf-objdump -d hello.elf
```
---
📌 Target Audience
Embedded firmware developers

RISC-V hardware designers

Students and researchers working on baremetal RISC-V projects

Developers of custom boards like ThejoRathna32

---

🧭 Roadmap
Add support for additional ISA extensions (rv32imc, rv32ima)

Provide prebuilt OBS binaries for cross-platform use

Integrate with CMake for firmware projects

Expand documentation with linker script and startup code examples

---

📜 License
This project follows the licensing of upstream components:

GCC: GPLv3

Binutils: GPLv3

Newlib: BSD-style

GDB: GPLv3

---
🤝 Contributing

Contributions are welcome!

Submit OBS spec file improvements

Add example firmware projects

Report build issues for GCC 16.1 RV32 targets