Yosys open synthesis suite
http://www.clifford.at/yosys/
Yosys is a synthesis suite for FPGAs and ASICs.
It includes a verilog parser and the logic synthetizer ABC.
- Links to electronics / yosys
- Has a link diff
- Download package
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Checkout Package
osc -A https://api.opensuse.org checkout home:wkazubski:test:electronics/yosys && cd $_ - Create Badge
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Source Files (show merged sources derived from linked package)
| Filename | Size | Changed |
|---|---|---|
| _link | 0000000119 119 Bytes | |
| yosys-0.63.tar.gz | 0003560456 3.4 MB | |
| yosys-use-gcc13.patch | 0000002736 2.67 KB | |
| yosys-use-python311.patch | 0000011587 11.3 KB | |
| yosys-use-system-cxxopts.patch | 0000000450 450 Bytes | |
| yosys.changes | 0000018716 18.3 KB | |
| yosys.spec | 0000003374 3.29 KB |
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