Icarus Verilog
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
- Sources inherited from project openSUSE:13.1
- Download package
-
Checkout Package
osc -A https://api.opensuse.org checkout openSUSE:13.1:Update/iverilog && cd $_ - Create Badge
Refresh
Refresh
Source Files
| Filename | Size | Changed |
|---|---|---|
| iverilog-0.9.6-fix-licensing-issues.patch | 0000055040 53.8 KB | over 10 years |
| iverilog.changes | 0000003168 3.09 KB | over 10 years |
| iverilog.spec | 0000002351 2.3 KB | over 10 years |
| verilog-0.9.6.tar.gz | 0001219982 1.16 MB | over 10 years |
Comments 0